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Travelled to:
1 × Turkey
6 × USA
Collaborated with:
T.Sherwood J.Oberg R.Kastner F.T.Chong C.Hunger W.Hu A.Irturk X.Li V.Kashyap B.Hardekopf Chandrasekhar Nagarajan A.Shafiee R.Balasubramonian A.Harris Lluís Vilanova C.Papamanthou Yoav Etsion C.Liu M.Maas M.W.Hicks E.Shi M.Kazdagli A.S.Rawat A.G.Dimakis S.Vishwanath H.M.G.Wassel B.Mazloom S.Mysore J.K.Oberg V.R.Rajarathinam Mark Gallagher Lauren Biernacki Shibo Chen Zelalem Birhanu Aweke Salessawi Ferede Yitbarek Misiker Tadesse Aga Zhixing Xu B.Kasikci V.Bertacco S.Malik T.M.Austin
Talks about:
inform (4) flow (4) hardwar (3) secur (3) languag (2) defens (2) track (2) level (2) gate (2) base (2)

Person: Mohit Tiwari

DBLP DBLP: Tiwari:Mohit

Contributed to:

ASPLOS 20152015
HPCA 20152015
ASPLOS 20142014
DAC 20112011
PLDI 20112011
DAC 20102010
ASPLOS 20092009
ASPLOS 20182018
ASPLOS 20192019

Wrote 10 papers:

ASPLOS-2015-LiuHMHTS #memory management #named
GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation (CL, AH, MM, MWH, MT, ES), pp. 87–101.
HPCA-2015-HungerKRDVT #comprehension #using
Understanding contention-based channels and using them for defense (CH, MK, ASR, AGD, SV, MT), pp. 639–650.
ASPLOS-2014-0001KOTRKSHC #named #policy #security
Sapper: a language for hardware-level security policy enforcement (XL, VK, JKO, MT, VRR, RK, TS, BH, FTC), pp. 97–112.
DAC-2011-ObergHITSK #data flow
Information flow isolation in I2C and USB (JO, WH, AI, MT, TS, RK), pp. 254–259.
PLDI-2011-LiTOKCSH #data flow #hardware #named
Caisson: a hardware description language for secure information flow (XL, MT, JO, VK, FTC, TS, BH), pp. 109–120.
DAC-2010-ObergHITSK #analysis #data flow
Theoretical analysis of gate level information flow tracking (JO, WH, AI, MT, TS, RK), pp. 244–247.
ASPLOS-2009-TiwariWMMCS #data flow
Complete information flow tracking from the gates up (MT, HMGW, BM, SM, FTC, TS), pp. 109–120.
ASPLOS-2018-HungerVPET #web
DATS - Data Containers for Web Applications (CH, LV, CP, YE, MT), pp. 722–736.
ASPLOS-2019-GallagherBCAYAH #architecture #named
Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn (MG, LB, SC, ZBA, SFY, MTA, AH, ZX, BK, VB, SM, MT, TMA), pp. 469–484.
ASPLOS-2019-NagarajanSBT #named
ρ: Relaxed Hierarchical ORAM (CN, AS, RB, MT), pp. 659–671.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.