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Travelled to:
1 × France
1 × Germany
Collaborated with:
G.G.E.Gielen E.Maricau J.Loeckx J.Martín-Martínez B.Kaczer G.Groeseneken R.Rodríguez M.Nafría
Talks about:
reliabl (2) nanomet (2) cmos (2) technolog (1) challeng (1) circuit (1) analysi (1) analog (1) yield (1) mitig (1)

Person: Peter H. N. De Wit

DBLP DBLP: Wit:Peter_H=_N=_De

Contributed to:

DATE 20112011
DATE 20082008

Wrote 2 papers:

DATE-2011-GielenMW #analysis #reliability
Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation (GGEG, EM, PHNDW), pp. 1474–1479.
DATE-2008-GielenWMLMKGRN #challenge #reliability
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies (GGEG, PHNDW, EM, JL, JMM, BK, GG, RR, MN), pp. 1322–1327.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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