Travelled to:1 × France
2 × Germany
Collaborated with:C.Silvano G.Palermo I.S.Stamelakos V.Zaccaria G.Economakos I.Koutras D.Soudris
Talks about:architectur (2) reconfigur (2) synthesi (2) awar (2) coprocessor (1) threshold (1) processor (1) framework (1) construct (1) datapath (1)
Person: Sotirios Xydis
DBLP: Xydis:Sotirios
Contributed to:
201420132010Wrote 4 papers:
- DATE-2014-SilvanoPXS #architecture #manycore
- Voltage island management in near threshold manycore architectures to mitigate dark silicon (CS, GP, SX, ISS), pp. 1–6.
- DATE-2013-XydisPS #configuration management
- Thermal-aware datapath merging for coarse-grained reconfigurable processors (SX, GP, CS), pp. 1649–1654.
- DATE-2013-XydisPZS #architecture #compilation #framework #metamodelling #parametricity #synthesis
- A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customization (SX, GP, VZ, CS), pp. 659–664.
- DATE-2010-EconomakosXKS #component #configuration management #synthesis
- Construction of dual mode components for reconfiguration aware high-level synthesis (GE, SX, IK, DS), pp. 1357–1360.