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Travelled to:
1 × USA
Collaborated with:
T.Karnik Y.Ye J.Tschanz L.Wei S.M.Burns V.De S.Borkar
Talks about:
microprocessor (1) simultan (1) perform (1) total (1) power (1) optim (1) devic (1) alloc (1) size (1) high (1)

Person: Venkatesh Govindarajulu

DBLP DBLP: Govindarajulu:Venkatesh

Contributed to:

DAC 20022002

Wrote 1 papers:

DAC-2002-KarnikYTWBGDB #optimisation #performance
Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors (TK, YY, JT, LW, SMB, VG, VD, SB), pp. 486–491.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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