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Travelled to:
1 × China
1 × France
10 × USA
Collaborated with:
T.Karnik V.De M.(.Pant N.P.Jouppi P.Stenström G.Sery J.Tschanz H.Kaul M.Anders S.Hsu A.Agarwal R.Krishnamurthy R.Puri W.H.Joyner T.Garibay J.Lotz R.K.Montoye S.Narendra A.Keshavarzi A.B.Kahng J.M.Cohn A.Domic P.Groeneveld L.Scheffer J.Schoellkopf Y.Ye L.Wei S.M.Burns V.Govindarajulu N.P.Carter A.Agrawal R.Cledat H.David D.Dunning J.B.Fryman I.Ganev R.A.Golliver R.C.Knauerhase R.Lethin B.Meister A.K.Mishra W.R.Pinfold J.Teller J.Torrellas N.Vasilache G.Venkatesh J.Xu
Talks about:
design (5) microprocessor (3) perform (3) high (3) cmos (3) technolog (2) perspect (2) challeng (2) nanomet (2) integr (2)

Person: Shekhar Borkar

DBLP DBLP: Borkar:Shekhar

Contributed to:

DAC 20132013
HPCA 20132013
DAC 20122012
DAC 20112011
DAC 20092009
DAC 20082008
DAC 20072007
DATE 20072007
DAC 20062006
DAC 20042004
DAC 20032003
DAC 20022002

Wrote 14 papers:

DAC-2013-KarnikPB #power management
Power management and delivery for high-performance microprocessors (TK, M(P, SB), p. 3.
HPCA-2013-CarterABCDDFGGKLMMPTTVVX #architecture #named #ubiquitous
Runnemede: An architecture for Ubiquitous High-Performance Computing (NPC, AA, SB, RC, HD, DD, JBF, IG, RAG, RCK, RL, BM, AKM, WRP, JT, JT, NV, GV, JX), pp. 198–209.
DAC-2012-KaulAHAKB #challenge #design
Near-threshold voltage (NTV) design: opportunities and challenges (HK, MA, SH, AA, RK, SB), pp. 1153–1158.
DAC-2011-Borkar #3d #design #energy #integration #performance
3D integration for energy efficient system design (SB), pp. 214–219.
DAC-2009-Borkar #design
Design perspectives on 22nm CMOS and beyond (SB), pp. 93–94.
DAC-2008-PuriJBGLM #synthesis
Custom is from Venus and synthesis from Mars (RP, WHJ, SB, TG, JL, RKM), p. 992.
DAC-2007-Borkar #perspective
Thousand Core ChipsA Technology Perspective (SB), pp. 746–749.
DATE-2007-BorkarJS #integration
Microprocessors in the era of terascale integration (SB, NPJ, PS), pp. 237–242.
Electronics beyond nano-scale CMOS (SB), pp. 807–808.
DAC-2004-BorkarKD #challenge #design #reliability
Design and reliability challenges in nanometer technologies (SB, TK, VD), p. 75.
DAC-2003-BorkarKNTKD #architecture #parametricity
Parameter variations and impact on circuits and microarchitecture (SB, TK, SN, JT, AK, VD), pp. 338–342.
DAC-2003-KahngBCDGSS #design
Nanometer design: place your bets (ABK, SB, JMC, AD, PG, LS, JPS), pp. 546–547.
DAC-2002-KarnikYTWBGDB #optimisation #performance
Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors (TK, YY, JT, LW, SMB, VG, VD, SB), pp. 486–491.
DAC-2002-SeryBD #question #why
Life is CMOS: why chase the life after? (GS, SB, VD), pp. 78–83.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.