BibSLEIGH corpus
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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
L.Lin M.W.Heath I.G.Harris R.Vadlamani J.Zhao R.Tessier
Talks about:
nondetermin (1) asynchron (1) synchron (1) multicor (1) synchro (1) process (1) modular (1) analysi (1) variat (1) stabil (1)

Person: Wayne P. Burleson

DBLP DBLP: Burleson:Wayne_P=

Contributed to:

DATE 20102010
DAC 20092009
DATE v1 20042004

Wrote 3 papers:

DATE-2010-VadlamaniZBT #adaptation #composition #fault #manycore #using
Multicore soft error rate stabilization using adaptive dual modular redundancy (RV, JZ, WPB, RT), pp. 27–32.
DAC-2009-LinB #analysis #process
Analysis and mitigation of process variation impacts on Power-Attack Tolerance (LL, WPB), pp. 238–243.
DATE-v1-2004-HeathBH #named #nondeterminism
Synchro-Tokens: Eliminating Nondeterminism to Enable Chip-Level Test of Globally-Asynchronous Locally-Synchronous SoC?s (MWH, WPB, IGH), pp. 410–415.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.