BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
2 × USA
Collaborated with:
A.Nahir M.Dusanapudi S.Kapoor K.Reick K.Schubert K.Sharp G.Wetli H.Yagi T.Kogel E.Haritan H.Tangi M.McNamara G.Smith N.Dutt G.Mancini S.Bergman G.Bobok W.Kowalski S.Koyfman S.Moran Z.Nevo A.Orni V.Paruthi G.Shurek V.Vuyyuru
Talks about:
processor (1) industri (1) silicon (1) fiction (1) experi (1) design (1) verif (1) valid (1) stori (1) power (1)

Person: Wolfgang Roesner

DBLP DBLP: Roesner:Wolfgang

Contributed to:

DATE 20152015
DAC 20142014
DAC 20082008

Wrote 3 papers:

DATE-2015-BergmanBKKMNOPR #experience #industrial #verification
Designer-level verification: an industrial experience story (SB, GB, WK, SK, SM, ZN, AO, VP, WR, GS, VV), pp. 410–411.
DAC-2014-NahirDKRRSSW #validation
Post-Silicon Validation of the IBM POWER8 Processor (AN, MD, SK, KR, WR, KDS, KS, GW), p. 6.
DAC-2008-YagiRKHTMSDM #question
ESL hand-off: fact or EDA fiction? (HY, WR, TK, EH, HT, MM, GS, ND, GM), pp. 310–312.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.