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Travelled to:
1 × France
3 × USA
5 × Germany
Collaborated with:
H.Meyr R.Leupers M.Braun G.Ascheid A.Hoffmann E.Villar A.Jantsch C.Grimm G.Braun E.Haritan G.Martin R.Plyaskin A.Herkersdorf F.Schirrmeister M.Vaupel T.Kempf M.Doerper B.Vanthournout A.Wieferink A.Nohl R.Puri S.Krolikoski J.Cong B.D.McCredie J.Shen A.Takach H.Yagi W.Roesner H.Tangi M.McNamara G.Smith N.Dutt G.Mancini M.Hohenauer H.Scharwächter K.Karuri O.Wahlen H.v.Someren
Talks about:
system (5) processor (4) platform (4) level (3) methodolog (2) heterogen (2) framework (2) virtual (2) simul (2) multi (2)

Person: Tim Kogel

DBLP DBLP: Kogel:Tim

Contributed to:

DATE 20122012
DAC 20092009
DAC 20082008
DATE 20082008
DATE 20062006
DATE 20052005
DAC 20042004
DATE v2 20042004
DATE 20012001

Wrote 10 papers:

DATE-2012-LeupersMPHSKV #platform
Virtual platforms: Breaking new grounds (RL, GM, RP, AH, FS, TK, MV), pp. 685–690.
DAC-2009-PuriHKCKMST #challenge
From milliwatts to megawatts: system level power challenge (RP, EH, SK, JC, TK, BDM, JS, AT), pp. 750–751.
DAC-2008-YagiRKHTMSDM #question
ESL hand-off: fact or EDA fiction? (HY, WR, TK, EH, HT, MM, GS, ND, GM), pp. 310–312.
DATE-2008-VillarJGK #specification #using
Heterogeneous System-level Specification Using SystemC (EV, AJ, CG, TK).
DATE-2006-KogelB #embedded #multi #platform #prototype
Virtual prototyping of embedded platforms for wireless and multimedia (TK, MB), pp. 488–490.
DATE-2005-KempfDLAMKV #composition #framework #multi #simulation
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms (TK, MD, RL, GA, HM, TK, BV), pp. 876–881.
DAC-2004-KogelM #energy
Heterogeneous MP-SoC: the solution to energy-efficient signal processing (TK, HM), pp. 686–691.
DATE-v2-2004-HohenauerSKWKLAMBS #c #compilation #generative #modelling
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models (MH, HS, KK, OW, TK, RL, GA, HM, GB, HvS), pp. 1276–1283.
DATE-v2-2004-WieferinkKLAMBN #communication #framework #multi
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform (AW, TK, RL, GA, HM, GB, AN), pp. 1256–1263.
DATE-2001-HoffmanKM #framework #performance
A framework for fast hardware-software co-simulation (AH, TK, HM), pp. 760–765.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.