Travelled to:1 × France
1 × Sweden
2 × USA
Collaborated with:M.Li C.J.Xue T.Liu C.Fu Y.A.Liu C.Wang M.Gorbovitski T.Rothamel Y.Cheng J.Zhang
Talks about:memori (3) partit (2) core (2) architectur (1) transform (1) processor (1) implement (1) instruct (1) approxim (1) variabl (1)
Person: Yingchao Zhao
DBLP: Zhao:Yingchao
Contributed to:
2015
2011
2010
2006Wrote 4 papers:
- DATE-2015-FuZLX #manycore #memory management
- Maximizing common idle time on multi-core processors with shared memory (CF, YZ, ML, CJX), pp. 900–903.
- DAC-2011-LiuZXL #clustering #hybrid #in memory #memory management #power management
- Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory (TL, YZ, CJX, ML), pp. 405–410.
- LCTES-2010-LiXLZ #analysis #approximate #architecture #memory management
- Analysis and approximation for bank selection instruction minimization on partitioned memory architecture (ML, CJX, TL, YZ), pp. 1–8.
- PEPM-2006-LiuWGRCZZ #data access #implementation #performance
- Core role-based access control: efficient implementations by transformations (YAL, CW, MG, TR, YC, YZ, JZ), pp. 112–120.