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Travelled to:
4 × Germany
7 × France
Collaborated with:
M.Favalli D.Rossi M.Omaña B.Riccò C.Steiner T.M.Mak N.Timoncini M.Spica J.M.Cazeaux L.Schiano M.Renovell G.A.Mojoli J.M.Portal S.Pastore J.Figueras Y.Zorian D.Salvi G.R.Sechi
Talks about:
high (5) test (4) code (4) testabl (3) detect (3) fault (3) error (3) check (3) self (3) line (3)

Person: Cecilia Metra

DBLP DBLP: Metra:Cecilia

Contributed to:

DATE 20112011
DATE 20072007
DATE 20062006
DATE v1 20042004
DATE 20032003
DATE 20022002
DATE 20012001
DATE 20002000
DATE 19991999
DATE 19981998
ED&TC 19971997

Wrote 14 papers:

DATE-2011-RossiTSM #analysis #fault #memory management #performance #reliability
Error correcting code analysis for cache memory high reliability and performance (DR, NT, MS, CM), pp. 1620–1625.
DATE-2007-FavalliM #detection #fault #interactive
Interactive presentation: Pulse propagation for the detection of small delay defects (MF, CM), pp. 1295–1300.
DATE-2006-OmanaCRM #detection #fault #low cost #reliability
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects (MO, JMC, DR, CM), pp. 170–175.
DATE-2006-RossiSM #analysis
Analysis of the impact of bus implemented EDCs on on-chip SSN (DR, CS, CM), pp. 59–64.
DATE-v1-2004-MetraMO #design #fault #question #testing
Are Our Design for Testability Features Fault Secure? (CM, TMM, MO), pp. 714–715.
DATE-2003-OmanaRM #parallel
High Speed and Highly Testable Parallel Two-Rail Code Checker (MO, DR, CM), pp. 10608–10615.
DATE-2002-FavalliM #fault #problem #self
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths (MF, CM), pp. 612–617.
DATE-2002-MetraSRF #online #power management #self #testing
Self-Checking Scheme for the On-Line Testing of Power Supply Noise (CM, LS, BR, MF), pp. 832–836.
DATE-2001-FavalliM #detection #fault #optimisation
Optimization of error detecting codes for the detection of crosstalk originated errors (MF, CM), pp. 290–296.
DATE-2000-MetraFR #online #testing
On-Line Testing and Diagnosis of Bus Lines with respect to Intermediate Voltage Values (CM, MF, BR), p. 763.
DATE-1999-FavalliM #design #functional #on the #self
On the Design of Self-Checking Functional Units Based on Shannon Circuits (MF, CM), pp. 368–375.
Highly Testable and Compact 1-out-of-n Code Checker with Single Output (CM, MF, BR), pp. 981–982.
DATE-1998-MetraRMPPFZSS #novel #testing
Novel Technique for Testing FPGAs (CM, MR, GAM, JMP, SP, JF, YZ, DS, GRS), pp. 89–94.
EDTC-1997-FavalliM #testing
Testing scheme for IC’s clocks (MF, CM), pp. 445–449.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.