BibSLEIGH — Eduardo

Travelled to:

1 × Germany
1 × Spain
2 × France
4 × USA

Collaborated with:

J.Abella F.J.Cazorla L.Kosmidis T.Vardanega J.Jalle Sara Royuela X.Martorell L.M.Pinho G.Fernandez R.Vargas A.Marongiu J.Parcerisa A.González S.Kehr B.Böddeker G.Schäfer S.Milutinovic F.Wartel M.Slijepcevic G.Farrall C.Curtsinger E.D.Berger L.Fossati M.Zulianello S.Girbal M.Moretó A.Grasset S.Yehia A.Gogonel A.Baldovin Z.R.Stephenson B.Triquet C.Lo E.Mezzetti I.Broster L.Cucu-Grosjean

Talks about:

time (12) multicor (5) cach (4) probabilist (3) processor (3) analysi (3) system (3) design (3) real (3) open (3)

Person: Eduardo Quiñones

DBLP: Qui=ntilde=ones:Eduardo

Facilitated 1 volumes:

Contributed to:

2015

2014

2013

2007

2017

2018

Wrote 16 papers:

DAC-2015-FernandezJAQVC #bound #realtime: Increasing confidence on measurement-based contention bounds for real-time round-robin buses (GF, JJ, JA, EQ, TV, FJC), p. 6.
DAC-2015-FernandezJAQVC15a #manycore #off the shelf #resource management: Resource usage templates and signatures for COTS multicore processors (GF, JJ, JA, EQ, TV, FJC), p. 6.
DAC-2015-KehrQBS #communication #execution #legacy #manycore #parallel: Parallel execution of AUTOSAR legacy applications on multicore ECUs with timed implicit communication (SK, EQ, BB, GS), p. 6.
DAC-2015-MilutinovicQAC #estimation #named #performance: PACO: fast average-performance estimation for time-randomized caches (SM, EQ, JA, FJC), p. 6.
DATE-2015-VargasQM #predict #question: OpenMP and timing predictability: a possible union? (RV, EQ, AM), pp. 617–620.
DATE-2015-WartelKGBSTQLMB #analysis #case study #hardware #platform: Timing analysis of an avionics case study on complex hardware/software platforms (FW, LK, AG, AB, ZRS, BT, EQ, CL, EM, IB, JA, LCG, TV, FJC), pp. 397–402.
SAC-2015-FernandezAQVFZC #multi #off the shelf: Introduction to partial time composability for COTS multicores (GF, JA, EQ, TV, LF, MZ, FJC), pp. 1955–1956.
DAC-2014-KosmidisQAFWC #certification #hardware: Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware (LK, EQ, JA, GF, FW, FJC), p. 6.
DAC-2014-SlijepcevicKAQC #manycore #realtime: Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems (MS, LK, JA, EQ, FJC), p. 6.
DATE-2014-JalleKAQC #design #manycore: Bus designs for time-probabilistic multicore processors (JJ, LK, JA, EQ, FJC), pp. 1–6.
DAC-2013-GirbalMGAQCY #convergence #on the: On the convergence of mainstream and mission-critical markets (SG, MM, AG, JA, EQ, FJC, SY), p. 10.
DATE-2013-KosmidisAQC #design #realtime: A cache design for probabilistically analysable real-time systems (LK, JA, EQ, FJC), pp. 513–518.
DATE-2013-KosmidisCQABC #analysis #design #probability: Probabilistic timing analysis on conventional cache designs (LK, CC, EQ, JA, EDB, FJC), pp. 603–606.
HPCA-2007-QuinonesPG #branch #execution #predict: Improving Branch Prediction and Predicated Execution in Out-of-Order Processors (EQ, JMP, AG), pp. 75–84.
AdaEurope-2017-RoyuelaMQP #ada #correctness #safety: OpenMP Tasking Model for Ada: Safety and Correctness (SR, XM, EQ, LMP), pp. 184–200.
AdaEurope-2018-RoyuelaMQP #ada #analysis #compilation #parallel: Safe Parallelism: Compiler Analysis Techniques for Ada and OpenMP (SR, XM, EQ, LMP), pp. 141–157.