BibSLEIGH — Francisco_J

Travelled to:

1 × Germany
1 × India
1 × Spain
1 × United Kingdom
2 × France
4 × USA

Collaborated with:

J.Abella E.Quiñones L.Kosmidis T.Vardanega J.Jalle G.Fernandez M.Valero S.Milutinovic E.Mezzetti M.Moretó P.Radojkovic V.Cakarevic J.Verdú A.Pajuelo M.Nemirovsky F.Wartel M.Slijepcevic V.Jiménez A.Buyuktosunoglu P.Bose F.P.O'Connell G.Farrall C.Curtsinger E.D.Berger L.Fossati M.Zulianello S.Girbal A.Grasset S.Yehia Enrique Díaz Mikel Fernández C.Hernández Irune Agirre Mikel Azkarate-askasua A.Gogonel A.Baldovin Z.R.Stephenson B.Triquet C.Lo I.Broster L.Cucu-Grosjean

Talks about:

time (11) multicor (6) cach (6) system (5) probabilist (4) processor (3) analysi (3) design (3) real (3) softwar (2)

Person: Francisco J. Cazorla

DBLP: Cazorla:Francisco_J=

Contributed to:

2015

2014

2013

2012

2010

2017

Wrote 16 papers:

DAC-2015-FernandezJAQVC #bound #realtime: Increasing confidence on measurement-based contention bounds for real-time round-robin buses (GF, JJ, JA, EQ, TV, FJC), p. 6.
DAC-2015-FernandezJAQVC15a #manycore #off the shelf #resource management: Resource usage templates and signatures for COTS multicore processors (GF, JJ, JA, EQ, TV, FJC), p. 6.
DAC-2015-MilutinovicQAC #estimation #named #performance: PACO: fast average-performance estimation for time-randomized caches (SM, EQ, JA, FJC), p. 6.
DATE-2015-WartelKGBSTQLMB #analysis #case study #hardware #platform: Timing analysis of an avionics case study on complex hardware/software platforms (FW, LK, AG, AB, ZRS, BT, EQ, CL, EM, IB, JA, LCG, TV, FJC), pp. 397–402.
HPCA-2015-JimenezBBOCV #manycore #performance: Increasing multicore system efficiency through intelligent bandwidth shifting (VJ, AB, PB, FPO, FJC, MV), pp. 39–50.
SAC-2015-FernandezAQVFZC #multi #off the shelf: Introduction to partial time composability for COTS multicores (GF, JA, EQ, TV, LF, MZ, FJC), pp. 1955–1956.
DAC-2014-KosmidisQAFWC #certification #hardware: Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware (LK, EQ, JA, GF, FW, FJC), p. 6.
DAC-2014-SlijepcevicKAQC #manycore #realtime: Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems (MS, LK, JA, EQ, FJC), p. 6.
DATE-2014-JalleKAQC #design #manycore: Bus designs for time-probabilistic multicore processors (JJ, LK, JA, EQ, FJC), pp. 1–6.
DAC-2013-GirbalMGAQCY #convergence #on the: On the convergence of mainstream and mission-critical markets (SG, MM, AG, JA, EQ, FJC, SY), p. 10.
DATE-2013-KosmidisAQC #design #realtime: A cache design for probabilistically analysable real-time systems (LK, JA, EQ, FJC), pp. 513–518.
DATE-2013-KosmidisCQABC #analysis #design #probability: Probabilistic timing analysis on conventional cache designs (LK, CC, EQ, JA, EDB, FJC), pp. 603–606.
ASPLOS-2012-RadojkovicCMVPCNV #approach #parallel #statistics #thread: Optimal task assignment in multithreaded processors: a statistical approach (PR, VC, MM, JV, AP, FJC, MN, MV), pp. 235–248.
PPoPP-2010-RadojkovicCVPCNV #concurrent #network #parallel #thread: Thread to strand binding of parallel network applications in massive multi-threaded systems (PR, VC, JV, AP, FJC, MN, MV), pp. 191–202.
AdaEurope-2017-DiazFKMHAC #analysis #bound #manycore #named #probability: MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding (ED, MF, LK, EM, CH, JA, FJC), pp. 102–118.
AdaEurope-2017-MilutinovicAAAM #reliability: Software Time Reliability in the Presence of Cache Memories (SM, JA, IA, MAa, EM, TV, FJC), pp. 233–249.