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Travelled to:
3 × France
3 × Germany
Collaborated with:
G.G.E.Gielen D.d.Jonghe P.H.N.D.Wit T.McConaghy B.Tasic H.D.Stratigopoulos J.Loeckx J.Martín-Martínez B.Kaczer G.Groeseneken R.Rodríguez M.Nafría
Talks about:
reliabl (6) analog (5) circuit (4) nanomet (3) analysi (3) simul (3) cmos (3) stochast (2) variabl (2) model (2)

Person: Elie Maricau

DBLP DBLP: Maricau:Elie

Contributed to:

DATE 20132013
DATE 20122012
DATE 20112011
DATE 20102010
DATE 20092009
DATE 20082008

Wrote 8 papers:

DATE-2013-GielenM #modelling #probability #simulation
Stochastic degradation modeling and simulation for analog integrated circuits in nanometer CMOS (GGEG, EM), pp. 326–331.
DATE-2012-JongheMGMTS #modelling #roadmap #testing #verification
Advances in variation-aware modeling, verification, and testing of analog ICs (DdJ, EM, GGEG, TM, BT, HGDS), pp. 1615–1620.
DATE-2012-MaricauJG #analysis #learning #multi #reliability #using
Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection (EM, DdJ, GGEG), pp. 745–750.
DATE-2011-GielenMW #analysis #reliability
Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation (GGEG, EM, PHNDW), pp. 1474–1479.
DATE-2011-MaricauG #analysis #probability #reliability
Stochastic circuit reliability analysis (EM, GGEG), pp. 1285–1290.
DATE-2010-MaricauG #complexity #reliability #simulation #variability
Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity (EM, GGEG), pp. 1094–1099.
DATE-2009-MaricauG #performance #reliability #simulation #variability
Efficient reliability simulation of analog ICs including variability and time-varying stress (EM, GGEG), pp. 1238–1241.
DATE-2008-GielenWMLMKGRN #challenge #reliability
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies (GGEG, PHNDW, EM, JL, JMM, BK, GG, RR, MN), pp. 1322–1327.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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