Travelled to:7 × USA
Collaborated with:R.K.Venkatesan H.H.Najaf-abadi V.K.Reddy S.Parthasarathy S.Herr A.S.Al-Zawawi K.Z.Ibrahim G.T.Byrd K.Sundaramoorthy Z.Purser Q.Jacobson J.E.Smith
Talks about:slipstream (2) processor (2) toler (2) fault (2) dram (2) base (2) low (2) multiprocessor (1) superscalar (1) architectur (1)
Person: Eric Rotenberg
DBLP: Rotenberg:Eric
Contributed to:
2009
200620062005200320001999Wrote 7 papers:
- HPCA-2009-Najaf-abadiR #architecture
- Architectural Contesting (HHNa, ER), pp. 189–200.
- ASPLOS-2006-ReddyRP #comprehension #fault tolerance #predict #thread
- Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance (VKR, ER, SP), pp. 83–94.
- HPCA-2006-VenkatesanHR #agile
- Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM (RKV, SH, ER), pp. 155–165.
- HPCA-2005-VenkatesanAR #memory management #power management
- Tapping ZettaRAMTM for Low-Power Memory Systems (RKV, ASAZ, ER), pp. 83–94.
- HPCA-2003-IbrahimBR #execution #multi
- Slipstream Execution Mode for CMP-Based Multiprocessors (KZI, GTB, ER), pp. 179–190.
- ASPLOS-2000-SundaramoorthyPR #fault tolerance #performance
- Slipstream Processors: Improving both Performance and Fault Tolerance (KS, ZP, ER), pp. 257–268.
- HPCA-1999-RotenbergJS #case study #independence
- A Study of Control Independence in Superscalar Processors (ER, QJ, JES), pp. 115–124.