BibSLEIGH — Pierre_G

Travelled to:

3 × Germany
6 × France
7 × USA

Collaborated with:

J.P.Knight C.Liem ∅ A.A.Jerraya C.Pilkington E.Bensoudane L.Pozzi P.Magarshack F.Karim P.Bromley T.C.May E.F.Girczyc M.Langevin D.Lyonnard S.L.Beux J.Trajkovic I.O'Connor G.Nicolescu G.Bois V.Gerousis O.Levia M.Pinto C.Rowen G.Saucier F.Bacchini R.A.Bergamaschi R.Pawate A.Bernstein R.Chandra M.Ben-Romdhane E.Haritan T.Hattori H.Yagi W.Wolf A.Nohl D.Wingard M.Müller O.Benny B.Lavigueur D.Lo M.Cornero M.Santana J.Gentit J.Lopez X.Figari L.Bergher

Talks about:

processor (8) design (5) instruct (4) system (4) multi (4) architectur (3) synthesi (3) platform (3) challeng (3) network (3)

Person: Pierre G. Paulin

DBLP: Paulin:Pierre_G=

Contributed to:

2011

2008

2007

2006

2004

2003

2002

2001

1997

1996

1994

1989

1987

1986

Wrote 19 papers:

DAC-2011-Paulin #challenge #industrial #multi #perspective #programming: Programming challenges & solutions for multi-processor SoCs: an industrial perspective (PGP), pp. 262–267.
DATE-2011-BeuxTONBP #architecture #design: Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology (SLB, JT, IO, GN, GB, PGP), pp. 788–793.
DAC-2008-HaritanHYPWNWM #challenge #design #exclamation #manycore #question #what: Multicore design is the challenge! what is the solution? (EH, TH, HY, PGP, WW, AN, DW, MM), pp. 128–130.
DATE-2007-PozziP #future of #question: A future of customizable processors: are we there yet? (LP, PGP), pp. 1224–1225.
DATE-2006-PaulinPLBBLLL #distributed #modelling #multi #power management: Distributed object models for multi-processor SoC’s, with application to low-power multimedia wireless systems (PGP, CP, ML, EB, OB, DL, BL, DL), pp. 482–487.
DAC-2004-BacchiniPBPBCB #design #industrial: System level design: six success stories in search of an industry (FB, PGP, RAB, RP, AB, RC, MBR), pp. 349–350.
DATE-DF-2004-PaulinPBLL #framework #multi #performance: Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding (PGP, CP, EB, ML, DL), pp. 58–63.
DAC-2003-MagarshackP: System-on-chip beyond the nanometer wall (PM, PGP), pp. 419–424.
DATE-2003-PaulinPB #challenge #framework #network #platform: Network Processing Challenges and an Experimental NPU Platform (PGP, CP, EB), pp. 20064–20069.
DATE-2002-GerousisLPPRS #framework #platform #question: Who Owns the Platform? (VG, OL, PGP, MP, CR, GS), p. 238.
DATE-2001-PaulinKB #architecture #embedded #network #requirements #tool support: Network processors: a perspective on market requirements, processor architectures and embedded S/W tools (PGP, FK, PB), pp. 420–429.
DAC-1997-LiemCSPJGLFB #case study #development #embedded #multi: Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor (CL, MC, MS, PGP, AAJ, JMG, JL, XF, LB), pp. 780–785.
EDTC-1997-LiemPJ #design #embedded #named: ReCode: the design and re-design of the instruction codes for embedded instruction-set processors (CL, PGP, AAJ), p. 612.
DAC-1996-LiemPJ #architecture #compilation: Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures (CL, PGP, AAJ), pp. 597–600.
EDAC-1994-LiemMP #code generation: Instruction-Set Matching and Selection for DSP and ASIP Code Generation (CL, TCM, PGP), pp. 31–37.
DAC-1989-Paulin #clustering #finite #state machine: Horizontal Partitioning of PLA-based Finite State Machines (PGP), pp. 333–338.
DAC-1989-PaulinK #algorithm #scheduling #synthesis: Scheduling and Binding Algorithms for High-Level Synthesis (PGP, JPK), pp. 1–6.
DAC-1987-PaulinK #automation #scheduling #synthesis: Force-Directed Scheduling in Automatic Data Path Synthesis (PGP, JPK), pp. 195–202.
DAC-1986-PaulinKG #approach #automation #multi #named #synthesis: HAL: a multi-paradigm approach to automatic data path synthesis (PGP, JPK, EFG), pp. 263–270.