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Travelled to:
1 × Germany
3 × France
6 × USA
Collaborated with:
T.Chelcea M.Y.Agyekum M.Theobald P.B.McGee C.Jeong A.Ghiribaldi D.Bertozzi E.Brunvand K.Y.Yun T.Wu A.Bardsley D.A.Edwards R.O.Ozdag P.A.Beerel M.Singh P.Kudva G.Gopalakrishnan H.M.Jacobson
Talks about:
asynchron (8) system (4) synthesi (3) robust (3) hazard (3) transform (2) interfac (2) insensit (2) communic (2) support (2)

Person: Steven M. Nowick

DBLP DBLP: Nowick:Steven_M=

Contributed to:

DATE 20132013
DATE 20112011
DATE 20102010
DAC 20052005
DAC 20042004
DAC 20022002
DATE 20022002
DAC 20012001
DAC 19991999
DAC 19961996

Wrote 13 papers:

DATE-2013-GhiribaldiBN #architecture #effectiveness #manycore
A transition-signaling bundled data NoC switch architecture for cost-effective GALS multicore systems (AG, DB, SMN), pp. 332–337.
DATE-2011-AgyekumN #communication #hardware #robust
A delay-insensitive bus-invert code and hardware support for robust asynchronous global communication (MYA, SMN), pp. 1370–1375.
DATE-2010-AgyekumN #communication #hardware #robust
An error-correcting unordered code and hardware support for robust asynchronous global communication (MYA, SMN), pp. 765–770.
DAC-2005-McGeeN #classification #design #framework #pipes and filters
A lattice-based framework for the classification and design of asynchronous pipelines (PBM, SMN), pp. 491–496.
DAC-2004-JeongN #detection #performance
Fast hazard detection in combinational circuits (CJ, SMN), pp. 592–595.
DAC-2002-ChelceaN #optimisation #scalability
Resynthesis and peephole transformations for the optimization of large-scale asynchronous systems (TC, SMN), pp. 405–410.
DATE-2002-ChelceaNBE #synthesis
A Burst-Mode Oriented Back-End for the Balsa Synthesis System (TC, SMN, AB, DAE), pp. 330–337.
DATE-2002-OzdagBSN #performance #pipes and filters
High-Speed Non-Linear Asynchronous Pipelines (ROO, PAB, MS, SMN), pp. 1000–1007.
DAC-2001-ChelceaN #interface #protocol #robust
Robust Interfaces for Mixed-Timing Systems with Application to Latency-Insensitive Protocols (TC, SMN), pp. 21–26.
DAC-2001-TheobaldN #distributed #optimisation #synthesis
Transformations for the Synthesis and Optimization of Asynchronous Distributed Control (MT, SMN), pp. 263–268.
DAC-1999-BrunvandNY #design #interface
Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces (EB, SMN, KYY), pp. 104–109.
DAC-1996-KudvaGJN #multi #network #synthesis
Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes (PK, GG, HMJ, SMN), pp. 77–82.
DAC-1996-TheobaldNW #heuristic #logic #named
Espresso-HF: A Heuristic Hazard-Free Minimizer for Two-Level Logic (MT, SMN, TW), pp. 71–76.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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