Travelled to:
1 × France
1 × Germany
Collaborated with:
∅ F.Catthoor G.Martin P.Groeneveld R.Lauwereins K.Maex P.v.d.Steeg R.Wilson
Talks about:
semiconductor (1) interconnect (1) technolog (1) challeng (1) problem (1) system (1) design (1) scale (1) level (1) solv (1)
Person: Andrea Cuomo
DBLP: Cuomo:Andrea
Contributed to:
Wrote 2 papers:
- DATE-v1-2004-CatthoorCMGLMSW #design #how #problem #question #scalability
- How Can System-Level Design Solve the Interconnect Technology Scaling Problem? (FC, AC, GM, PG, RL, KM, PvdS, RW), pp. 332–339.
- DATE-2003-Cuomo #challenge
- Semiconductor Challenges (AC), pp. 10008–10009.