BibSLEIGH corpus
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XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
1 × Germany
4 × USA
Collaborated with:
Y.Zorian L.Sarno S.Eo L.Lestringand J.Goodenough G.Stark S.Leef D.Witt J.Gianelli C.Hamlin K.McElvain S.Leibson I.Bolson R.Tobias R.Camposano F.Catthoor A.Cuomo G.Martin P.Groeneveld R.Lauwereins K.Maex P.v.d.Steeg T.Borgstrom E.Haritan D.Abada A.Dauman R.Chandra O.Mielo C.Cruse A.Nohl
Talks about:
platform (2) hardwar (2) system (2) design (2) show (2) interconnect (1) technolog (1) apprentic (1) structur (1) prototyp (1)

Person: Ron Wilson

DBLP DBLP: Wilson:Ron

Contributed to:

DAC 20092009
DAC 20072007
DAC 20062006
DAC 20052005
DATE v1 20042004
DATE 20012001

Wrote 6 papers:

DAC-2009-BorgstromHWADCMCN #hardware #hybrid #prototype #question
System prototypes: virtual, hardware or hybrid? (TB, EH, RW, DA, AD, RC, OM, CC, AN), pp. 1–3.
DAC-2007-SarnoWELGSLW #ll
IP Exchange: I’ll Show You Mine if You Show Me Yours (LS, RW, SKE, LL, JG, GS, SL, DW), pp. 990–991.
Decision-making for complex SoCs in consumer electronic products (RW, YZ), p. 173.
DAC-2005-WilsonGHMLBTC #framework #platform #question
Structured/platform ASIC apprentices: which platform will survive your board room? (RW, JG, CH, KM, SL, IB, RT, RC), pp. 887–888.
DATE-v1-2004-CatthoorCMGLMSW #design #how #problem #question #scalability
How Can System-Level Design Solve the Interconnect Technology Scaling Problem? (FC, AC, GM, PG, RL, KM, PvdS, RW), pp. 332–339.
DATE-2001-Wilson #challenge #design #hardware
Managing the SoC design challenge with “Soft” hardware (RW), pp. 610–611.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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