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Travelled to:
2 × USA
3 × Germany
5 × France
Collaborated with:
P.Giusto E.A.Harcourt R.Leupers F.Schirrmeister P.Thomas D.Heine D.Moolenaar J.Kim L.Eeckhout N.P.Topham X.Chen R.Plyaskin A.Herkersdorf T.Kogel M.Vaupel D.Sciuto W.Rosenstiel S.Swan F.Ghenassia P.Flake J.Srouji P.J.Mosterman D.Orofino J.Sztipanovits A.A.Jerraya W.Kruijtzer V.Reyes C.G.Cassandras F.Catthoor A.Cuomo P.Groeneveld R.Lauwereins K.Maex P.v.d.Steeg R.Wilson G.Smith D.Nadamuni S.Malik R.Chapman J.Fogelin K.Keutzer B.Bailey
Talks about:
system (7) embed (5) design (4) mission (3) level (3) platform (2) overview (2) virtual (2) softwar (2) where (2)

Person: Grant Martin

DBLP DBLP: Martin:Grant

Facilitated 1 volumes:

DAC 2005Ed

Contributed to:

DATE 20132013
DATE 20122012
DATE 20112011
DATE 20082008
DAC 20062006
DATE v1 20042004
DAC 20022002
DATE 20022002
DATE 20012001
DATE 19981998

Wrote 12 papers:

Configurability in IP subystems: baseband examples (PXT, GM, DH, DM, JK), pp. 163–168.
DATE-2012-LeupersMPHSKV #platform
Virtual platforms: Breaking new grounds (RL, GM, RP, AH, FS, TK, MV), pp. 685–690.
DATE-2011-LeupersEMSTC #manycore #towards
Virtual Manycore platforms: Moving towards 100+ processor cores (RL, LE, GM, FS, NPT, XC), pp. 715–720.
DATE-2008-MostermanOSJKRCM #automation #embedded #functional #modelling
Automatically Realising Embedded Systems from High-Level Functional Models (PJM, DO, JS, AAJ, WK, VR, CGC, GM).
DAC-2006-Martin #challenge #design #overview
Overview of the MPSoC design challenge (GM), pp. 274–279.
DATE-v1-2004-CatthoorCMGLMSW #design #how #problem #question #scalability
How Can System-Level Design Solve the Interconnect Technology Scaling Problem? (FC, AC, GM, PG, RL, KM, PvdS, RW), pp. 332–339.
DATE-v1-2004-SciutoMRSGFS #question
SystemC and SystemVerilog: Where do They Fit? Where are They Going? (DS, GM, WR, SS, FG, PF, JS), pp. 122–129.
DAC-2002-SmithNMCFKMB #embedded #question #tool support
Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant? (GS, DN, SM, RC, JF, KK, GM, BB), p. 479.
DATE-2002-Martin #embedded #how
How to Choose Semiconductor IP: Embedded Software (GM), p. 16.
DATE-2002-Martin02a #design #embedded #motivation #overview #perspective #specification #uml
UML for Embedded Systems Specification and Design: Motivation and Overview (GM), pp. 773–775.
DATE-2001-GiustoMH #embedded #estimation #execution #reliability
Reliable estimation of execution time of embedded software (PG, GM, EAH), pp. 580–589.
DATE-1998-Martin #design
Design Methodologies for System Level IP (GM), pp. 286–289.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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