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Travelled to:
1 × France
5 × USA
Collaborated with:
G.Hasteer P.Banerjee V.Krishnaswamy S.Saluja A.Dasdan R.K.Gupta P.Chauhan D.Goyal N.Sharma
Talks about:
analysi (2) system (2) verif (2) rate (2) constraint (1) algorithm (1) sequenti (1) properti (1) implicit (1) datapath (1)

Person: Anmol Mathur

DBLP DBLP: Mathur:Anmol

Contributed to:

DAC 20092009
DAC 20072007
DAC 20012001
DAC 19981998
DAC 19971997
ED&TC 19971997

Wrote 6 papers:

DAC-2009-ChauhanGHMS #equivalence
Non-cycle-accurate sequential equivalence checking (PC, DG, GH, AM, NS), pp. 460–465.
DAC-2007-MathurK #design #modelling #verification
Design for Verification in System-level Models and RTL (AM, VK), pp. 193–198.
DAC-2001-MathurS #analysis #precise #using
Improved Merging of Datapath Operators using Information Content and Required Precision Analysis (AM, SS), pp. 462–467.
DAC-1998-HasteerMB #algorithm #automaton #verification
An Implicit Algorithm for Finding Steady States and its Application to FSM Verification (GH, AM, PB), pp. 611–614.
DAC-1997-HasteerMB #performance
An Efficient Assertion Checker for Combinational Properties (GH, AM, PB), pp. 734–739.
EDTC-1997-DasdanMG #analysis #constraints #debugging #embedded #named
RATAN: A tool for rate analysis and rate constraint debugging for embedded systems (AD, AM, RKG), pp. 2–6.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.