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Travelled to:
3 × USA
Collaborated with:
S.Kang Y.Cheng E.Rosenbaum L.Yuan A.Dharchoudhury J.Lu P.Chen C.Chang L.Sha D.J.Huang C.Cheng
Talks about:
diagnosi (2) reliabl (2) vlsi (2) chip (2) interconnect (1) electrostat (1) electromigr (1) placement (1) sequenti (1) nesterov (1)

Person: Chin-Chi Teng

DBLP DBLP: Teng:Chin=Chi

Contributed to:

DAC 20142014
DAC 19971997
DAC 19961996

Wrote 4 papers:

DAC-2014-LuCCSHTC #named #using
ePlace: Electrostatics Based Placement Using Nesterov’s Method (JL, PC, CCC, LS, DJHH, CCT, CKC), p. 6.
DAC-1997-YuanTK #estimation #statistics
Statistical Estimation of Average Power Dissipation in Sequential Circuits (LPY, CCT, SMK), pp. 377–382.
DAC-1996-ChengTDRK #named #reliability
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips (YKC, CCT, AD, ER, SMK), pp. 548–551.
DAC-1996-TengCRK #reliability
Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects (CCT, YKC, ER, SMK), pp. 752–757.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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