Travelled to:3 × USA
Collaborated with:S.Kang Y.Cheng C.Teng R.Kanj T.Lehner B.Agrawal T.Li C.Tsai A.Dharchoudhury
Talks about:cmos (3) substrat (2) diagnosi (2) reliabl (2) vlsi (2) chip (2) interconnect (1) electromigr (1) character (1) hierarch (1)
Person: Elyse Rosenbaum
DBLP: Rosenbaum:Elyse
Contributed to:
200419991996Wrote 4 papers:
- DAC-2004-KanjLAR
- Noise characterization of static CMOS gates (RK, TL, BA, ER), pp. 888–893.
- DAC-1999-LiTRK #modelling #simulation
- Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation (TL, CHT, ER, SMK), pp. 549–554.
- DAC-1996-ChengTDRK #named #reliability
- iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips (YKC, CCT, AD, ER, SMK), pp. 548–551.
- DAC-1996-TengCRK #reliability
- Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects (CCT, YKC, ER, SMK), pp. 752–757.