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Travelled to:
2 × USA
Collaborated with:
A.Aharon M.Levinger Y.Lichtenstein Y.Malka C.Metzger M.Molcho G.Shurek A.Adir D.Hershcovich O.Hershkovitz B.G.Hickerson K.Holtz W.Kadry A.Koyfman J.M.Ludden C.Meissner A.Nahir R.R.Pratt M.Schiffli B.S.Onge B.W.Thompto E.Tsanko A.Ziv
Talks about:
verif (2) power (2) processor (1) transact (1) function (1) program (1) generat (1) memori (1) test (1) ibm (1)

Person: Dave Goodman

DBLP DBLP: Goodman:Dave

Contributed to:

DAC 20142014
DAC 19951995

Wrote 2 papers:

DAC-2014-AdirGHHHHKKLMNPSOTTZ #memory management #transaction #verification
Verification of Transactional Memory in POWER8 (AA, DG, DH, OH, BGH, KH, WK, AK, JML, CM, AN, RRP, MS, BSO, BWT, ET, AZ), p. 6.
DAC-1995-AharonGLLMMMS #functional #generative #verification
Test Program Generation for Functional Verification of PowerPC Processors in IBM (AA, DG, ML, YL, YM, CM, MM, GS), pp. 279–285.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.