Travelled to:2 × USA
Collaborated with:M.L.Behm Y.Lichtenstein M.Rimon M.Vinov A.Adir D.Goodman D.Hershcovich O.Hershkovitz B.G.Hickerson K.Holtz W.Kadry A.Koyfman C.Meissner A.Nahir R.R.Pratt M.Schiffli B.S.Onge B.W.Thompto E.Tsanko A.Ziv
Talks about:verif (2) processor (1) transact (1) industri (1) languag (1) generat (1) memori (1) experi (1) power (1) test (1)
Person: John M. Ludden
DBLP: Ludden:John_M=
Contributed to:
20142004Wrote 2 papers:
- DAC-2014-AdirGHHHHKKLMNPSOTTZ #memory management #transaction #verification
- Verification of Transactional Memory in POWER8 (AA, DG, DH, OH, BGH, KH, WK, AK, JML, CM, AN, RRP, MS, BSO, BWT, ET, AZ), p. 6.
- DAC-2004-BehmLLRV #experience #generative #industrial #testing #verification
- Industrial experience with test generation languages for processor verification (MLB, JML, YL, MR, MV), pp. 36–40.