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Travelled to:
1 × Germany
2 × USA
3 × France
Collaborated with:
B.M.Al-Hashimi J.N.Mistry S.Hill S.Yang S.S.Khursheed A.Darbari J.Biggs K.Flautner D.Roberts D.I.Patel X.Ouyang D.W.Nellans R.Wipfel D.K.Panda
Talks about:
power (5) gate (3) retent (2) design (2) state (2) mode (2) methodolog (1) techniqu (1) standbi (1) rethink (1)

Person: David Flynn

DBLP DBLP: Flynn:David

Contributed to:

DAC 20132013
DATE 20112011
HPCA 20112011
DATE 20102010
DATE 20092009
DATE DF 20042004

Wrote 6 papers:

DAC-2013-Flynn #power management
Power gating applied to MP-SoCs for standby-mode power management (DF), p. 5.
DATE-2011-MistryAFH #power management
Sub-clock power-gating technique for minimising leakage power during active mode (JNM, BMAH, DF, SH), pp. 106–111.
Beyond block I/O: Rethinking traditional storage primitives (XO, DWN, RW, DF, DKP), pp. 301–311.
DATE-2010-YangAFK #design #power management #reliability
Scan based methodology for reliable state retention power gating designs (SY, BMAH, DF, SSK), pp. 69–74.
DATE-2009-DarbariAFB #design #simulation #using
Selective state retention design using symbolic simulation (AD, BMAH, DF, JB), pp. 1644–1649.
DATE-DF-2004-FlautnerFRP #energy #named #performance #scalability
IEM926: An Energy Efficient SoC with Dynamic Voltage Scaling (KF, DF, DR, DIP), pp. 324–329.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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