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Travelled to:
1 × France
2 × USA
Collaborated with:
K.Roy V.K.Chippa A.Raghunathan I.J.Chang S.T.Chakradhar
Talks about:
scalabl (3) voltag (2) resili (2) design (2) architectur (1) processor (1) algorithm (1) function (1) approxim (1) process (1)

Person: Debabrata Mohapatra

DBLP DBLP: Mohapatra:Debabrata

Contributed to:

DATE 20112011
DAC 20102010
DAC 20092009

Wrote 3 papers:

DATE-2011-MohapatraCRR #approximate #design
Design of voltage-scalable meta-functions for approximate computing (DM, VKC, AR, KR), pp. 950–955.
DAC-2010-ChippaMRRC #algorithm #design #energy #hardware #performance #scalability
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency (VKC, DM, AR, KR, STC), pp. 555–560.
DAC-2009-ChangMR #architecture #hybrid #process #video
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors (IJC, DM, KR), pp. 670–675.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.