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Travelled to:
1 × France
1 × Germany
4 × USA
Collaborated with:
A.L.Sangiovanni-Vincentelli P.Nuzzo M.I.Jordan L.P.Carloni M.Sgroi G.V.d.Plas L.V.d.Perre B.Gyselinckx P.Terreni V.Giannini J.Craninckx B.Come S.D'Amico A.Baschirotto
Talks about:
design (4) analog (3) platform (2) explor (2) space (2) power (2) base (2) methodolog (1) represent (1) synthesi (1)

Person: Fernando De Bernardinis

DBLP DBLP: Bernardinis:Fernando_De

Contributed to:

DAC 20062006
DATE 20062006
DAC 20052005
DAC 20042004
DATE v1 20042004
DAC 20032003

Wrote 6 papers:

A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW (PN, GVdP, FDB, LVdP, BG, PT), pp. 873–878.
DATE-2006-GianniniNBCCDB #design #power management #synthesis
A synthesis tool for power-efficient base-band filter design (VG, PN, FDB, JC, BC, SD, AB), pp. 162–163.
DAC-2005-BernardinisNV #design #platform
Mixed signal design space exploration through analog platforms (FDB, PN, ALSV), pp. 875–880.
DAC-2004-Sangiovanni-VincentelliCBS #challenge #design #platform
Benefits and challenges for platform-based design (ALSV, LPC, FDB, MS), pp. 409–414.
DATE-v1-2004-BernardinisS #design
A Methodology for System-Level Analog Design Space Exploration (FDB, ALSV), pp. 676–677.
DAC-2003-BernardinisJS #performance #representation
Support vector machines for analog circuit performance representation (FDB, MIJ, ALSV), pp. 964–969.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.