BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
1 × USA
3 × Germany
Collaborated with:
G.G.E.Gielen S.Donnay A.Baschirotto Y.Ke P.Nuzzo P.Gao X.Xing V.Chironi B.Debaillie M.Ingels A.Geis J.Ryckaert Y.Rolain G.Vandersteen V.Giannini F.D.Bernardinis B.Come S.D'Amico
Talks about:
design (4) rail (2) cmos (2) base (2) reconfigur (1) methodolog (1) synthesi (1) frequenc (1) amplitud (1) synthes (1)

Person: Jan Craninckx

DBLP DBLP: Craninckx:Jan

Contributed to:

DATE 20122012
DATE 20102010
DATE 20092009
DATE 20062006
DAC 20032003

Wrote 6 papers:

DATE-2012-GaoXCG #design
Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping (PG, XX, JC, GGEG), pp. 1215–1220.
A compact digital amplitude modulator in 90nm CMOS (VC, BD, AB, JC, MI), pp. 702–705.
An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation (AG, PN, JR, YR, GV, JC), pp. 697–701.
DATE-2009-KeCG #configuration management #design
A design methodology for fully reconfigurable Delta-Sigma data converters (YK, JC, GGEG), pp. 1379–1384.
DATE-2006-GianniniNBCCDB #design #power management #synthesis
A synthesis tool for power-efficient base-band filter design (VG, PN, FDB, JC, BC, SD, AB), pp. 162–163.
DAC-2003-CraninckxD #design #how #question
4G terminals: how are we going to design them? (JC, SD), pp. 79–84.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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