BibSLEIGH — Luca_P

Travelled to:

1 × Italy
3 × France
3 × Germany
9 × USA

Collaborated with:

A.L.Sangiovanni-Vincentelli H.Liu M.Petracca R.L.Collins K.Bergman Y.Jung A.Pinto G.Hendry J.Chan G.D.Guglielmo C.Pilato B.Vellore C.Li S.Sonalkar F.Leonardi A.Shacham A.Bonivento C.Pinello K.L.McMillan N.Bombieri F.Fummi J.Park I.Diakonikolas Y.Yoon N.Concer F.D.Bernardinis M.Sgroi A.Biberman

Talks about:

network (7) design (7) synthesi (5) platform (5) level (5) system (4) embed (4) high (4) base (4) insensit (3)

Person: Luca P. Carloni

DBLP: Carloni:Luca_P=

Contributed to:

2015

2014

2013

2012

2011

2010

2009

2007

2006

2004

2002

2000

1999

Wrote 21 papers:

DAC-2015-JungC #embedded #multi #named #performance #platform #simulation: ΣVP: host-GPU multiplexing for efficient simulation of multiple embedded GPUs on virtual platforms (YJ, LPC), p. 6.
DAC-2014-GuglielmoPC #composition #design #synthesis: A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs (GDG, CP, LPC), p. 6.
DAC-2013-BombieriLFC #c++ #synthesis: A method to abstract RTL IP blocks into C++ code and enable high-level synthesis (NB, HYL, FF, LPC), p. 9.
DAC-2013-JungPPC #distributed #embedded #framework #named #platform #scalability: netShip: a networked virtual platform for large-scale heterogeneous distributed embedded systems (YJ, JP, MP, LPC), p. 10.
DAC-2013-LiuC #on the #synthesis: On learning-based methods for design-space exploration with high-level synthesis (HYL, LPC), p. 7.
DATE-2012-LiuPC #composition #design #synthesis: Compositional system-level design exploration with planning of high-level synthesis (HYL, MP, LPC), pp. 641–646.
DAC-2011-LiuDPC #approximate #composition #design #set: Supervised design space exploration by compositional approximation of Pareto sets (HYL, ID, MP, LPC), pp. 399–404.
DATE-2011-HendryCCB #design #named #network #specification: VANDAL: A tool for the design specification of nanophotonic networks (GH, JC, LPC, KB), pp. 782–787.
DAC-2010-YoonCPC #analysis #comparative #multi #network #physics: Virtual channels vs. multiple physical networks: a comparative analysis (YJY, NC, MP, LPC), pp. 162–165.
DATE-2010-ChanHBBC #analysis #named #network: PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks (JC, GH, AB, KB, LPC), pp. 691–696.
DATE-2010-CollinsVC #code generation #manycore #parallel #recursion: Recursion-driven parallel code generation for multi-core platforms (RLC, BV, LPC), pp. 190–195.
DATE-2010-LiSC #logic #manycore: Exploiting local logic structures to optimize multi-core SoC floorplanning (CHL, SS, LPC), pp. 1291–1296.
DATE-2009-LeonardiPC #case study #deployment #distributed #embedded #network: A case study in distributed deployment of embedded software for camera networks (FL, AP, LPC), pp. 1006–1011.
DAC-2007-CollinsC #optimisation #throughput: Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System (RLC, LPC), pp. 410–415.
DAC-2007-ShachamBC #network #power management: The Case for Low-Power Photonic Networks on Chip (AS, KB, LPC), pp. 132–135.
DATE-2006-BoniventoCS #design #industrial #network #platform: Platform-based design of wireless sensor networks for industrial applications (AB, LPC, ALSV), pp. 1103–1107.
DAC-2004-Sangiovanni-VincentelliCBS #challenge #design #platform: Benefits and challenges for platform-based design (ALSV, LPC, FDB, MS), pp. 409–414.
DATE-v2-2004-PinelloCS #deployment #embedded #fault tolerance #realtime: Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications (CP, LPC, ALSV), pp. 1164–1169.
DAC-2002-PintoCS #communication #constraints #synthesis: Constraint-driven communication synthesis (AP, LPC, ALSV), pp. 783–788.
DAC-2000-CarloniS #analysis #latency #optimisation #performance: Performance analysis and optimization of latency insensitive systems (LPC, ALSV), pp. 361–367.
CAV-1999-CarloniMS #latency #protocol: Latency Insensitive Protocols (LPC, KLM, ALSV), pp. 123–133.