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Travelled to:
1 × Germany
3 × France
Collaborated with:
F.V.Fernández E.Afacan I.F.Baskaya A.Unutulmaz Ö.Yetik O.Saglamdemir S.Talay G.Berkol A.E.Pusane S.Ay K.Atasu R.G.Dimond O.Mencer W.Luk C.C.Özturan
Talks about:
optim (4) analog (3) tool (2) area (2) architectur (1) constraint (1) processor (1) floorplan (1) bandwidth (1) strategi (1)

Person: Günhan Dündar

DBLP DBLP: D=uuml=ndar:G=uuml=nhan

Contributed to:

DATE 20152015
DATE 20142014
DATE 20132013
DATE 20072007

Wrote 5 papers:

DATE-2015-AfacanBPDB #hybrid #monte carlo
A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool (EA, GB, AEP, GD, IFB), pp. 1225–1228.
DATE-2014-AfacanAFDB #automation #design #modelling #optimisation
Model based hierarchical optimization strategies for analog design automation (EA, SA, FVF, GD, IFB), pp. 1–4.
DATE-2013-UnutulmazDF #optimisation #using
Area optimization on fixed analog floorplans using convex area functions (AU, GD, FVF), pp. 1843–1848.
DATE-2007-AtasuDMLOD #constraints #optimisation
Optimizing instruction-set extensible processors under data bandwidth constraints (KA, RGD, OM, WL, CCÖ, GD), pp. 588–593.
DATE-2007-YetikSTD #architecture #interactive #matlab #optimisation
Interactive presentation: A coefficient optimization and architecture selection tool for SigmaDelta modulators in MATLAB (ÖY, OS, ST, GD), pp. 87–92.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.