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Travelled to:
2 × USA
3 × France
5 × Germany
Collaborated with:
P.Y.K.Cheung O.Mencer R.G.Dimond T.Todman P.G.Potter S.Stilkerich Q.Liu B.Cope R.C.C.Cheung S.A.Fahmy T.Rissa A.Donlin G.A.Constantinides M.Köster J.Hagemeyer M.Porrmann D.Lee A.A.Gaffar S.López R.Sarmiento W.W.S.Chu S.Perrott S.P.Seng K.Atasu C.C.Özturan G.Dündar
Talks about:
reconfigur (6) design (4) optim (4) processor (3) system (3) customis (2) optimis (2) hardwar (2) memori (2) explor (2)

Person: Wayne Luk

DBLP DBLP: Luk:Wayne

Contributed to:

DAC 20152015
DATE 20102010
DATE 20092009
DATE 20082008
DATE 20072007
DATE 20062006
DAC 20052005
DATE 20052005
DATE 20052004
DATE DF 20042004
DATE 20012001

Wrote 14 papers:

DAC-2015-TodmanSL #configuration management #design #monitoring #runtime #verification
In-circuit temporal monitors for runtime verification of reconfigurable designs (TT, SS, WL), p. 6.
DATE-2010-LiuTL #automation #design #optimisation #power management
Combining optimizations in automated low power design (QL, TT, WL), pp. 1791–1796.
DATE-2010-LopezSPLC #hardware #image
Exploration of hardware sharing for image encoders (SL, RS, PGP, WL, PYKC), pp. 1737–1742.
DATE-2009-KoesterLHP #configuration management #design #optimisation
Design optimizations to improve placeability of partial reconfiguration modules (MK, WL, JH, MP), pp. 976–981.
DATE-2009-PotterLC #configuration management #design
Partition-based exploration for reconfigurable JPEG designs (PGP, WL, PYKC), pp. 886–889.
DATE-2008-CopeCL #configuration management #gpu #logic #memory management #using
Using Reconfigurable Logic to Optimise GPU Memory Accesses (BC, PYKC, WL), pp. 44–49.
DATE-2007-AtasuDMLOD #constraints #optimisation
Optimizing instruction-set extensible processors under data bandwidth constraints (KA, RGD, OM, WL, CCÖ, GD), pp. 588–593.
DATE-2006-DimondML #automation #memory management #resource management
Automating processor customisation: optimised memory access and resource sharing (RGD, OM, WL), pp. 206–211.
DAC-2005-LeeGML #named #optimisation
MiniBit: bit-width optimization via affine arithmetic (DUL, AAG, OM, WL), pp. 837–840.
DATE-2005-CheungLC #configuration management
Reconfigurable Elliptic Curve Cryptosystems on a Chip (RCCC, WL, PYKC), pp. 24–29.
DATE-2005-FahmyCL #detection #hardware #markov
Hardware Acceleration of Hidden Markov Model Decoding for Person Detection (SAF, PYKC, WL), pp. 8–13.
DATE-2005-RissaDL04 #configuration management #embedded #evaluation #modelling
Evaluation of SystemC Modelling of Reconfigurable Embedded Systems (TR, AD, WL), pp. 253–258.
DATE-DF-2004-ChuDPSL #architecture #tool support
Customisable EPIC Processor: Architecture and Tools (WWSC, RGD, SP, SPS, WL), pp. 236–241.
DATE-2001-ConstantinidesCL #heuristic #multi
Heuristic datapath allocation for multiple wordlength systems (GAC, PYKC, WL), pp. 791–797.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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