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Travelled to:
4 × USA
Collaborated with:
X.Li S.R.Nassif S.S.Sapatnekar X.Liu S.Sun P.Zhou H.Zhou C.Cher E.Kursun S.Yao H.Xiang C.Zhou Y.Lin F.Yee A.Sullivan P.Lu T.Jin Q.Wang L.Xu C.Pan L.Dou L.H.0001 T.Xie
Talks about:
generat (3) placement (2) sensor (2) full (2) chip (2) fin (2) temperatur (1) methodolog (1) framework (1) thermal (1)

Person: Haifeng Qian

DBLP DBLP: Qian:Haifeng

Contributed to:

DAC 20152015
DAC 20142014
DAC 20122012
DAC 20032003
ESEC/FSE 20192019

Wrote 5 papers:

DAC-2015-LiuSZLQ #generative #statistics
A statistical methodology for noise sensor placement and full-chip voltage map generation (XL, SS, PZ, XL, HQ), p. 6.
DAC-2014-XiangQZLYSL #generative
Row Based Dual-VDD Island Generation and Placement (HX, HQ, CZ, YSL, FY, AS, PFL), p. 6.
DAC-2012-ZhouLCKQY #framework #monitoring
An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring (HZ, XL, CYC, EK, HQ, SCY), pp. 642–647.
DAC-2003-QianNS #network #random
Random walks in a supply network (HQ, SRN, SSS), pp. 93–98.
ESEC-FSE-2019-JinWXPDQ0X #generative #named #testing
FinExpert: domain-specific test generation for FinTech systems (TJ, QW, LX, CP, LD, HQ, LH0, TX), pp. 853–862.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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