Travelled to:
1 × France
1 × Germany
2 × USA
Collaborated with:
R.Leupers H.Meyr M.Hohenauer G.Ascheid J.Ceng W.Sheng G.Braun A.Nohl J.Castrillón T.Isshiki H.Kunieda K.Karuri O.Wahlen T.Kogel H.v.Someren
Talks about:
processor (2) adl (2) interprocedur (1) methodolog (1) framework (1) techniqu (1) parallel (1) approach (1) support (1) network (1)
Person: Hanno Scharwächter
DBLP: Scharw=auml=chter:Hanno
Contributed to:
Wrote 4 papers:
- DAC-2008-CengCSSLAMIK #framework #named #parallel
- MAPS: an integrated framework for MPSoC application parallelization (JC, JC, WS, HS, RL, GA, HM, TI, HK), pp. 754–759.
- DATE-2006-ScharwachterHLAM #hardware #interprocedural #multi #network #optimisation #thread #using
- An interprocedural code optimization technique for network processors using hardware multi-threading support (HS, MH, RL, GA, HM), pp. 919–924.
- DAC-2004-BraunNSCHSLM #approach #consistency #design #flexibility #novel
- A novel approach for flexible and consistent ADL-driven ASIP design (GB, AN, WS, JC, MH, HS, RL, HM), pp. 717–722.
- DATE-v2-2004-HohenauerSKWKLAMBS #c #compilation #generative #modelling
- A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models (MH, HS, KK, OW, TK, RL, GA, HM, GB, HvS), pp. 1276–1283.