Travelled to:
1 × Germany
1 × USA
3 × France
Collaborated with:
H.Yasuura H.Takase H.Takada P.Mishra N.D.Dutt A.Nicolau T.Ishihara A.Inoue S.Hadjis A.Canis R.Sobue Y.Hara-Azumi J.Anderson B.Shackleford M.Yasuda E.Okushi H.Koizumi
Talks about:
system (3) memori (2) design (2) multi (2) base (2) microprocessor (1) processor (1) preemptiv (1) multicycl (1) synthesi (1)
Person: Hiroyuki Tomiyama
DBLP: Tomiyama:Hiroyuki
Contributed to:
Wrote 5 papers:
- DATE-2015-HadjisCSHTA #multi #synthesis
- Profiling-driven multi-cycling in FPGA high-level synthesis (SH, AC, RS, YHA, HT, JA), pp. 31–36.
- DATE-2010-TakaseTT #clustering #memory management #multi
- Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems (HT, HT, HT), pp. 1124–1129.
- DATE-2002-MishraDNT #automation #execution #functional #multi #pipes and filters #verification
- Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units (PM, NDD, AN, HT), pp. 36–43.
- DATE-1998-TomiyamaIIY #design #reduction #scheduling
- Instruction Scheduling for Power Reduction in Processor-Based System Design (HT, TI, AI, HY), pp. 855–860.
- DAC-1997-ShacklefordYOKTY #design #embedded #optimisation
- Memory-CPU Size Optimization for Embedded System Designs (BS, MY, EO, HK, HT, HY), pp. 246–251.