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Travelled to:
3 × USA
Collaborated with:
T.Sasaki A.Yamada N.Koike K.Ohmori S.Kato T.Nakazawa N.Nomizu N.Wakatsuki H.Shibano O.Itoh S.Funatsu
Talks about:
simul (2) logic (2) level (2) digit (2) larg (2) mix (2) generat (1) circuit (1) automat (1) system (1)

Person: Kyoji Tomita

DBLP DBLP: Tomita:Kyoji

Contributed to:

DAC 19831983
DAC 19801980
DAC 19771977

Wrote 3 papers:

DAC-1983-SasakiKOT #hardware #logic #named
HAL: A block level HArdware Logic simulator (TS, NK, KO, KT), pp. 150–156.
DAC-1980-SasakiYKNTN #logic #named #scalability #verification
MIXS: A mixed level simulator for large digital system logic verification (TS, AY, SK, TN, KT, NN), pp. 626–633.
DAC-1977-YamadaWSITF #automation #generative #scalability #testing
Automatic test generation for large digital circuits (AY, NW, HS, OI, KT, SF), pp. 78–83.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.