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Travelled to:
2 × USA
Collaborated with:
A.W.Wetzel R.J.Byrne A.D.Close R.M.McDermott
Talks about:
system (2) design (2) compil (2) vlsi (2) softwar (1) silicon (1) generat (1) environ (1) voltag (1) nation (1)

Person: N. J. Elias

DBLP DBLP: Elias:N=_J=

Contributed to:

DAC 19871987
DAC 19851985
DAC 19831983

Wrote 3 papers:

DAC-1987-Elias #case study #compilation #generative #layout #re-engineering
A Case Study in Silicon Compilation Software Engineering, HVDEV High Voltage Device Layout Generator (NJE), pp. 82–88.
DAC-1985-EliasBCM #design #integration #multi
The ITT VLSI design system: CAD integration in a multi-national environment (NJE, RJB, ADC, RMM), pp. 549–553.
DAC-1983-EliasW #compilation #design
The IC Module Compiler, a VLSI system design aid (NJE, AWW), pp. 46–49.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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