BibSLEIGH — Alex

Travelled to:

10 × France
12 × USA
6 × Germany

Collaborated with:

I.Bayraktaroglu R.Karri W.Rao P.Petrov M.Chen L.Goodby G.Bournoutian B.Arslan C.Yang I.G.Harris S.N.Hamilton C.J.Xue S.Garcia R.O.Topaloglu O.Sinanoglu S.Reda Y.Makris D.Gajski M.Zhao D.Tracy S.Ozev A.Hertwig T.Liu M.Li É.F.Cota L.Carro M.Lubaszewski

Talks about:

test (17) scan (11) fault (10) base (8) synthesi (7) applic (7) time (6) high (6) bist (6) processor (5)

Person: Alex Orailoglu

DBLP: Orailoglu:Alex

Contributed to:

2014

2013

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

2001

2000

1999

1998

1997

1996

1994

1993

1992

1986

Wrote 42 papers:

DATE-2014-BournoutianO #framework #mobile #optimisation: On-device objective-C application optimization framework for high-performance mobile processors (GB, AO), pp. 1–6.
DATE-2013-ZhaoOX #process #synthesis: Profit maximization through process variation aware high level synthesis with speed binning (MZ, AO, CJX), pp. 176–181.
DAC-2011-ChenO #fault #statistics: Diagnosing scan clock delay faults through statistical timing pruning (MC, AO), pp. 423–428.
DATE-2011-ArslanO #adaptation #effectiveness #learning #optimisation #realtime: Adaptive test optimization through real time learning of test effectiveness (BA, AO), pp. 1430–1435.
DATE-2011-ChenO #analysis #fault #image #statistics: Diagnosing scan chain timing faults through statistical feature analysis of scan images (MC, AO), pp. 185–190.
DATE-2011-LiuOXL #energy #reduction: Register allocation for simultaneous reduction of energy and peak temperature on registers (TL, AO, CJX, ML), pp. 20–25.
DATE-2011-YangO #adaptation #flexibility #manycore: Frugal but flexible multicore topologies in support of resource variation-driven adaptivity (CY, AO), pp. 1255–1260.
DATE-2010-ChenO #adaptation #effectiveness #identification: Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme (MC, AO), pp. 63–68.
DATE-2009-GarciaO #embedded #fault #information management #self: Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy (SG, AO), pp. 898–901.
DATE-2009-YangO #adaptation #towards: Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude (CY, AO), pp. 63–68.
DAC-2008-BournoutianO #design #embedded #reduction: Miss reduction in embedded processors through dynamic, power-friendly cache design (GB, AO), pp. 304–309.
DATE-2008-RaoO #fault tolerance #parallel #towards: Towards fault tolerant parallel prefix adders in nanoelectronic systems (WR, AO), pp. 360–365.
DATE-2007-RaoOK #fault tolerance #interactive #logic: Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs (WR, AO, RK), pp. 865–869.
DAC-2006-RaoOK #architecture #logic: Topology aware mapping of logic functions onto nanowire-based crossbar architectures (WR, AO, RK), pp. 723–726.
DAC-2005-PetrovTO #embedded #energy #memory management: Energy-effcient physically tagged caches for embedded processors with virtual memory (PP, DT, AO), pp. 17–22.
DAC-2005-TopalogluO #approach #process: A DFT approach for diagnosis and process variation-aware structural test of thermometer coded current steering DACs (ROT, AO), pp. 851–856.
DATE-v1-2004-SinanogluO #power management: Scan Power Minimization through Stimulus and Response Transformations (OS, AO), pp. 404–409.
DATE-v2-2004-ArslanO #architecture #named #reduction: CircularScan: A Scan Architecture for Test Cost Reduction (BA, AO), pp. 1290–1295.
DAC-2003-RaoBO: Test application time and volume compression through seed overlapping (WR, IB, AO), pp. 732–737.
DATE-2003-PetrovO #memory management #performance: Power Efficiency through Application-Specific Instruction Memory Transformations (PP, AO), pp. 10030–10035.
DATE-2003-RaoO #design: Virtual Compression through Test Vector Stitching for Scan Based Designs (WR, AO), pp. 10104–10109.
DATE-2002-BayraktarogluO #fault: Gate Level Fault Diagnosis in Scan-Based BIST (IB, AO), pp. 376–381.
DATE-2002-CotaCLO #design #testing: Test Planning and Design Space Exploration in a Core-Based Environment (ÉFC, LC, ML, AO), pp. 478–485.
DATE-2002-PetrovO #embedded #performance: Power Efficient Embedded Processor Ip’s through Application-Specific Tag Compression in Data Caches (PP, AO), pp. 1065–1071.
DATE-2002-RedaO #encoding #testing: Reducing Test Application Time Through Test Data Mutation Encoding (SR, AO), pp. 387–393.
DAC-2001-BayraktarogluO #reduction: Test Volume and Application Time Reduction Through Scan Chain Concealment (IB, AO), pp. 151–155.
DAC-2001-PetrovO #architecture #embedded: Speeding Up Control-Dominated Applications through Microarchitectural Customizations in Embedded Processors (PP, AO), pp. 512–517.
DATE-2001-BayraktarogluO: Diagnosis for scan-based BIST: reaching deep into the signatures (IB, AO), pp. 102–111.
DAC-2000-BayraktarogluO #fault: Improved fault diagnosis in scan-based BIST via superposition (IB, AO), pp. 55–58.
DATE-2000-GoodbyO #fault #quality: Test Quality and Fault Risk in Digital Filter Datapath BIST (LG, AO), pp. 468–475.
DATE-2000-OzevBO #synthesis: Test Synthesis for Mixed-Signal SOC Paths (SO, IB, AO), pp. 128–133.
DATE-1999-HamiltonOH: Self Recovering Controller and Datapath Codesign (SNH, AO, AH), pp. 596–601.
DATE-1999-MakrisO #behaviour #reachability #synthesis: Channel-Based Behavioral Test Synthesis for Improved Module Reachability (YM, AO), pp. 283–288.
DATE-1998-HamiltonO #concurrent #fault #latency: Concurrent Error Recovery with Near-Zero Latency in Synthesized ASICs (SNH, AO), pp. 604–609.
DAC-1997-GoodbyO: Frequency-Domain Compatibility in Digital Filter BIST (LG, AO), pp. 540–545.
DAC-1996-GoodbyO #pseudo: Pseudorandom-Pattern Test Resistance in High-Performance DSP Datapaths (LG, AO), pp. 813–818.
DAC-1994-HarrisO #architecture #concurrent #design #synthesis: Microarchitectural Synthesis of VLSI Designs with High Test Concurrency (IGH, AO), pp. 206–211.
DAC-1994-KarriO #architecture #detection #fault #self #synthesis: Area-Efficient Fault Detection During Self-Recovering Microarchitecture Synthesis (RK, AO), pp. 552–556.
EDAC-1994-HarrisO #concurrent #fine-grained #scheduling: Fine-Grained Concurrency in Test Scheduling for Partial-Intrusion BIST (IGH, AO), pp. 119–123.
DAC-1993-KarriO #architecture #synthesis: High-Level Synthesis of Fault-Secure Microarchitectures (RK, AO), pp. 429–433.
DAC-1992-KarriO #fault tolerance #synthesis: Transformation-Based High-Level Synthesis of Fault-Tolerant ASICs (RK, AO), pp. 662–665.
DAC-1986-OrailogluG #graph #representation: Flow graph representation (AO, DG), pp. 503–509.