BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × USA
3 × France
4 × Germany
Collaborated with:
W.Chen G.Schirner X.Han C.Chang P.Chandraiah R.Leupers A.Vajda M.Bekooij S.Ha A.Nohl
Talks about:
model (6) parallel (5) analysi (3) use (3) esl (3) happen (2) design (2) simul (2) order (2) mpsoc (2)

Person: Rainer Dömer

DBLP DBLP: D=ouml=mer:Rainer

Contributed to:

DATE 20152015
DATE 20142014
DATE 20132013
DATE 20122012
DATE 20092009
DATE 20082008
DAC 20072007
DATE 20062006

Wrote 8 papers:

DATE-2015-ChangD #analysis #model checking #modelling #using
May-happen-in-parallel analysis of ESL models using UPPAAL model checking (CWC, RD), pp. 1567–1570.
DATE-2014-ChenHD #analysis #graph #modelling
May-happen-in-parallel analysis based on segment graphs for safe ESL models (WC, XH, RD), pp. 1–6.
DATE-2013-ChenD #parallel #predict #simulation #using
Optimized out-of-order parallel discrete event simulation using predictions (WC, RD), pp. 3–8.
DATE-2012-ChenHD #design #parallel #simulation
Out-of-order parallel simulation for ESL design (WC, XH, RD), pp. 141–146.
DATE-2009-LeupersVBHDN #exclamation #programming
Programming MPSoC platforms: Road works ahead! (RL, AV, MB, SH, RD, AN), pp. 1584–1589.
DATE-2008-SchirnerD #modelling #scheduling #using
Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling (GS, RD), pp. 122–127.
DAC-2007-ChandraiahD #flexibility #generative #parallel #specification
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification (PC, RD), pp. 787–790.
DATE-2006-SchirnerD #analysis #modelling #transaction
Quantitative analysis of transaction level models for the AMBA bus (GS, RD), pp. 230–235.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.