Person: Fei Xie

DBLP: Xie:Fei

Contributed to:

2015

2014

2014

2013

2012

2011

2011

2010

2010

2010

2009

2008

2006

2006

2004

2004

2003

2003

2002

2001

2018

Wrote 24 papers:

ISSTA-2015-CongLYX #automation #fault #injection #robust #testing

Automatic fault injection for driver robustness testing (KC, LL, ZY, FX), pp. 361–372.

DAC-2014-YangHCLRX #behaviour #certification #framework #scalability #synthesis

Scalable Certification Framework for Behavioral Synthesis Front-End (ZY, KH, KC, LL, SR, FX), p. 6.

DATE-2014-CongLYX #evaluation #prototype #testing #validation

Coverage evaluation of post-silicon validation tests with virtual prototypes (KC, LL, ZY, FX), pp. 1–6.

DATE-2014-HaoRX #behaviour #equivalence #pipes and filters #synthesis

Equivalence checking for function pipelining in behavioral synthesis (KH, SR, FX), pp. 1–6.

DAC-2013-LeiXC #consistency #prototype

Post-silicon conformance checking with virtual prototypes (LL, FX, KC), p. 6.

DAC-2013-YangRHX #behaviour #design #equivalence #implementation #optimisation #synthesis

Handling design and implementation optimizations in equivalence checking for behavioral synthesis (ZY, SR, KH, FX), p. 6.

DAC-2012-HaoRX #behaviour #equivalence #pipes and filters

Equivalence checking for behaviorally synthesized pipelines (KH, SR, FX), pp. 344–349.

ASE-2011-LiXBLM #formal method #hardware #interface #specification

Formalizing hardware/software interface specifications (JL, FX, TB, VL, CM), pp. 143–152.

FASE-2011-LiXBL #automaton #model checking

Model Checking Büchi Pushdown Systems (JL, FX, TB, VL), pp. 141–155.

CAV-2010-LiXBL #analysis #automaton #hardware #performance #reachability

Efficient Reachability Analysis of Büchi Pushdown Systems for Hardware/Software Co-verification (JL, FX, TB, VL), pp. 339–353.

DATE-2010-HaoXRY #behaviour #equivalence #optimisation #synthesis

Optimizing equivalence checking for behavioral synthesis (KH, FX, SR, JY), pp. 1500–1505.

FASE-2010-LiXBLM #approach #hardware

An Automata-Theoretic Approach to Hardware/Software Co-verification (JL, FX, TB, VL, CM), pp. 248–262.

DATE-2009-HaoX #component #design #hardware #interface

Componentizing hardware/software interface design (KH, FX), pp. 232–237.

DAC-2008-ChenXY #abstraction #automation #evaluation #optimisation #refinement

Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation (YC, FX, JY), pp. 143–148.

CBSE-2006-XieB #component #product line #verification

Verification of Component-Based Software Application Families (FX, JCB), pp. 50–66.

CIAA-2006-YangXSP #hybrid #quantum #synthesis

Universality of Hybrid Quantum Gates and Synthesis Without Ancilla Qudits (GY, FX, XS, MAP), pp. 279–280.

FASE-2004-XieLKB #design #model checking

Translating Software Designs for Model Checking (FX, VL, RPK, JCB), pp. 324–338.

TACAS-2004-BallLX #automation #modelling

Automatic Creation of Environment Models via Training (TB, VL, FX), pp. 93–107.

ESEC-FSE-2003-XieB #component #composition

Verified systems by composition from verified components (FX, JCB), pp. 277–286.

FME-2003-XieBK #composition #reasoning

Translation-Based Compositional Reasoning for Software Systems (FX, JCB, RPK), pp. 582–599.

FASE-2002-XieB #design #execution #model checking #object-oriented #reduction

Integrated State Space Reduction for Model Checking Executable Object-Oriented Software System Designs (FX, JCB), pp. 64–79.

FASE-2002-XieLB #design #execution #model checking #named #object-oriented

ObjectCheck: A Model Checking Tool for Executable Object-Oriented Software System Designs (FX, VL, JCB), pp. 331–335.

ASE-2001-XieLB #execution #model checking #set #uml

Model Checking for an Executable Subset of UML (FX, VL, JCB), pp. 333–336.

FASE-2018-ChenHYCKX #framework #named #testing

CRETE: A Versatile Binary-Level Concolic Testing Framework (BC0, CH, ZY, KC, RK, FX), pp. 281–298.