Travelled to:5 × USA
Collaborated with:K.Sato T.Nagai H.Shimoyama K.Okazaki M.Terai M.Ozaki T.Moriya M.Tachibana H.Kanada C.Tanaka S.Murai H.Tsuji R.Katoh
Talks about:layout (4) system (3) design (3) masterslic (2) rout (2) grid (2) mos (2) lsi (2) horizont (1) hierarch (1)
Person: Toshihiko Yahara
DBLP: Yahara:Toshihiko
Contributed to:
19831982198119801979Wrote 6 papers:
- DAC-1983-OkazakiMY #multi
- A multiple media delay simulator for MOS LSI circuits (KO, TM, TY), pp. 279–285.
- DAC-1982-TeraiKSY #layout
- A consideration of the number of horizontal grids used in the routing of a masterslice layout (MT, HK, KS, TY), pp. 121–128.
- DAC-1981-SatoNTSOY #layout #named
- MILD — A cell-based layout system for MOS-LSI (KS, TN, MT, HS, MO, TY), pp. 828–836.
- DAC-1981-TanakaMTYOTKT #array #design #layout
- An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3 (CT, SM, HT, TY, KO, MT, RK, MT), pp. 812–819.
- DAC-1980-SatoSNOY
- A “grid-free” channel router (KS, HS, TN, MO, TY), pp. 22–31.
- DAC-1979-SatoNSY #design #layout #named
- MIRAGE — a simple-model routing program for the hierarchical layout design of IC masks (KS, TN, HS, TY), pp. 297–304.