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Travelled to:
1 × Austria
1 × Belgium
1 × Sweden
1 × Switzerland
1 × USA
1 × United Kingdom
2 × Germany
2 × Italy
2 × Portugal
3 × Spain
4 × France
Collaborated with:
M.Panunzio E.Mezzetti P.L.Martínez M.Bordin S.Mazzini J.A.d.l.Puente S.Puri J.Abella F.J.Cazorla A.Baldovin A.Zovi E.Quiñones Paolo Carletto G.Fernandez J.Jalle M.Ziccardi M.Schoeberl R.García G.Caspersen J.S.Pedersen Stefano Munari Sebastiano Valle A.Graziano A.Betts J.Ruiz A.Alonso R.López Laura Baracchi J.A.Pulido S.Urueña J.Zamorano M.D'Alessandro M.D.Natale A.Domenici G.Lipari L.Fossati M.Zulianello A.Cicchetti F.Ciccozzi S.Milutinovic Irune Agirre Mikel Azkarate-askasua F.Wartel L.Kosmidis A.Gogonel Z.R.Stephenson B.Triquet C.Lo I.Broster L.Cucu-Grosjean
Talks about:
time (14) develop (7) system (7) base (7) real (6) ravenscar (5) integr (5) high (5) ada (5) softwar (4)

Person: Tullio Vardanega

DBLP DBLP: Vardanega:Tullio

Facilitated 6 volumes:

Ada-Europe 2015Ed
Ada-Europe 2014Ed
Ada-Europe 2011Ed
Ada-Europe 2010Ed
Ada-Europe 2008Ed
Ada-Europe 2005Ed

Contributed to:

DAC 20152015
DATE 20152015
SAC 20152015
Ada-Europe 20132013
SAC 20132013
ASE 20122012
Ada-Europe 20122012
CBSE 20122012
Ada-Europe 20102010
Ada-Europe 20092009
DATE 20092009
Ada-Europe 20072007
Ada-Europe 20062006
Ada-Europe 20052005
Ada-Europe 20032003
Ada-Europe 20022002
Ada-Europe 20012001
Ada-Europe 19991999
ICSE 19941994
Ada-Europe 20162016
Ada-Europe 20172017
Ada-Europe 20182018

Wrote 28 papers:

DAC-2015-FernandezJAQVC #bound #realtime
Increasing confidence on measurement-based contention bounds for real-time round-robin buses (GF, JJ, JA, EQ, TV, FJC), p. 6.
DAC-2015-FernandezJAQVC15a #manycore #off the shelf #resource management
Resource usage templates and signatures for COTS multicore processors (GF, JJ, JA, EQ, TV, FJC), p. 6.
DATE-2015-WartelKGBSTQLMB #analysis #case study #hardware #platform
Timing analysis of an avionics case study on complex hardware/software platforms (FW, LK, AG, AB, ZRS, BT, EQ, CL, EM, IB, JA, LCG, TV, FJC), pp. 397–402.
SAC-2015-FernandezAQVFZC #multi #off the shelf
Introduction to partial time composability for COTS multicores (GF, JA, EQ, TV, LF, MZ, FJC), pp. 1955–1956.
SAC-2015-ZiccardiSV #operating system
A time-composable operating system for the Patmos processor (MZ, MS, TV), pp. 1892–1897.
AdaEurope-2013-BaldovinMV #operating system #towards
Towards a Time-Composable Operating System (AB, EM, TV), pp. 143–160.
SAC-2013-BaldovinGMV #kernel
Kernel-level time composability for avionics applications (AB, AG, EM, TV), pp. 1552–1554.
ASE-2012-CicchettiCMPPZV #development #industrial #modelling #named
CHESS: a model-driven engineering tool environment for aiding the development of complex industrial systems (AC, FC, SM, SP, MP, AZ, TV), pp. 362–365.
AdaEurope-2012-MartinezV #component #development #modelling #requirements
Handling Synchronization Requirements under Separation of Concerns in Model-Driven Component-Based Development (PLM, TV), pp. 89–104.
AdaEurope-2012-PanunzioV #ada #component #development
Ada Ravenscar Code Archetypes for Component-Based Development (MP, TV), pp. 1–17.
CBSE-2012-MartinezV #approach #component #realtime
An MDE approach to address synchronization needs in component-based real-time systems (PLM, TV), pp. 125–134.
AdaEurope-2010-MezzettiBRV #development
Cache-Aware Development of High-Integrity Systems (EM, AB, JR, TV), pp. 139–152.
AdaEurope-2010-MezzettiPV #ada
Preservation of Timing Properties with the Ada Ravenscar Profile (EM, MP, TV), pp. 153–166.
AdaEurope-2009-ZoviV #programming language #requirements
Requirements on the Target Programming Language for High-Integrity MDE (AZ, TV), pp. 1–15.
DATE-2009-MazziniPV #development #realtime
An MDE methodology for the development of high-integrity real-time systems (SM, SP, TV), pp. 1154–1159.
AdaEurope-2007-BordinV #approach #correctness #metamodelling #realtime
Correctness by Construction for High-Integrity Real-Time Systems: A Metamodel-Driven Approach (MB, TV), pp. 114–127.
AdaEurope-2007-PanunzioV #analysis #metamodelling #modelling #process
A Metamodel-Driven Process Featuring Advanced Model-Based Timing Analysis (MP, TV), pp. 128–141.
AdaEurope-2006-PulidoUZVP #ada #scheduling
Hierarchical Scheduling with Ada 2005 (JAP, SU, JZ, TV, JAdlP), pp. 1–12.
AdaEurope-2005-BordinV #ada
A New Strategy for the HRT-HOOD to Ada Mapping (MB, TV), pp. 51–66.
AdaEurope-2003-MazziniDNDLV #named #uml
HRT-UML: Taking HRT-HOOD onto UML (SM, MD, MDN, AD, GL, TV), pp. 405–416.
AdaEurope-2002-AlonsoLVP #case study #object-oriented #using
Using Object Orientation in High Integrity Applications: A Case Study (AA, RL, TV, JAdlP), pp. 357–366.
AdaEurope-2001-VardanegaGP #migration
An Application Case for Ravenscar Technology: Porting OBOSS to GNAT/ORK (TV, RG, JAdlP), pp. 392–404.
AdaEurope-1999-VardanegaCP #case study #embedded #realtime #reuse #using
A Case Study in the Reuse of On-board Embedded Real-Time Software (TV, GC, JSP), pp. 425–436.
ICSE-1994-Vardanega #ada #development #embedded #experience #realtime
Experience with the Development of Hard Real-Time Embedded Ada Software (TV), pp. 301–308.
AdaEurope-2016-BaracchiMPV #development #lessons learnt #modelling #towards
Lessons Learned in a Journey Toward Correct-by-Construction Model-Based Development (LB, SM, SP, TV), pp. 113–128.
AdaEurope-2017-CarlettoV #benchmark #comparative #metric #named #runtime
Ravenscar-EDF: Comparative Benchmarking of an EDF Variant of a Ravenscar Runtime (PC, TV), pp. 18–33.
AdaEurope-2017-MilutinovicAAAM #reliability
Software Time Reliability in the Presence of Cache Memories (SM, JA, IA, MAa, EM, TV, FJC), pp. 233–249.
AdaEurope-2018-MunariVV #agile #architecture
Microservice-Based Agile Architectures: An Opportunity for Specialized Niche Technologies (SM, SV, TV), pp. 158–174.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.