BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
4 × USA
Collaborated with:
M.Nemani E.Grochowski D.Ayers P.Ashar S.Malik D.Singh S.Rajgopal G.Mehta R.Patel F.Baez
Talks about:
power (3) perform (2) high (2) microarchitectur (1) microprocessor (1) methodolog (1) technolog (1) datapath (1) control (1) circuit (1)

Person: Vivek Tiwari

DBLP DBLP: Tiwari:Vivek

Contributed to:

HPCA 20022002
DAC 20002000
DAC 19981998
DAC 19931993

Wrote 4 papers:

HPCA-2002-GrochowskiAT #architecture #power management #simulation
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation (EG, DA, VT), pp. 7–16.
DAC-2000-NemaniT #design
Macro-driven circuit design methodology for high-performance datapaths (MN, VT), pp. 661–666.
DAC-1998-TiwariSRMPB
Reducing Power in High-Performance Microprocessors (VT, DS, SR, GM, RP, FB), pp. 732–737.
DAC-1993-TiwariAM
Technology Mapping for Lower Power (VT, PA, SM), pp. 74–79.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.