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Travelled to:
1 × France
2 × USA
Collaborated with:
S.Lesecq L.Vincent P.Maurine S.Joshi A.Lombardot M.Belleville S.Girard J.Christmann C.Condemine J.Willemin C.Piguet Y.Akgul D.Puschini I.M.Panades P.Benoit L.Torres A.Valentian B.Giraud O.Thomas T.Benoist Y.Thonnart S.Bernard G.Moritz O.Billoint Y.Maneglia P.Flatresse J.Noël F.Abouzeid B.Pelloux-Prayer A.Grover S.Clerc P.Roche J.L.Coz S.Engels R.Wilson
Talks about:
statist (2) circuit (2) voltag (2) power (2) manag (2) dynam (2) temperatur (1) methodolog (1) silicon (1) monitor (1)

Person: Edith Beigné

DBLP DBLP: Beign=eacute=:Edith

Contributed to:

DAC 20142014
DATE 20132013
DAC 20122012

Wrote 5 papers:

DAC-2014-AkgulPLBPBT #power management
Power management through DVFS and dynamic body biasing in FD-SOI circuits (YA, DP, SL, EB, IMP, PB, LT), p. 6.
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs (EB, AV, BG, OT, TB, YT, SB, GM, OB, YM, PF, JPN, FA, BPP, AG, SC, PR, JLC, SE, RW), pp. 613–618.
DATE-2013-JoshiLBBG #estimation #performance #statistics
A gate level methodology for efficient statistical leakage estimation in complex 32nm circuits (SJ, AL, MB, EB, SG), pp. 1056–1057.
DAC-2012-ChristmannBCWP #energy #power management
Energy harvesting and power management for autonomous sensor nodes (JFC, EB, CC, JW, CP), pp. 1049–1054.
DAC-2012-LionelPSE #monitoring #statistics #testing
Embedding statistical tests for on-chip dynamic voltage and temperature monitoring (LV, PM, SL, EB), pp. 994–999.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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