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Travelled to:
1 × France
2 × Germany
2 × USA
Collaborated with:
P.Ienne P.Brisk H.Parandeh-Afshar J.Großschädl L.Pozzi S.Tillich
Talks about:
arithmet (4) circuit (4) automat (2) explor (2) design (2) cryptographi (1) architectur (1) decomposit (1) compressor (1) algorithm (1)

Person: Ajay K. Verma

DBLP DBLP: Verma:Ajay_K=

Contributed to:

DATE 20082008
DAC 20072007
DATE 20072007
DAC 20062006
DATE 20062006

Wrote 6 papers:

DATE-2008-VermaBI #design #latency #paradigm
Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design (AKV, PB, PI), pp. 1250–1255.
DAC-2007-BriskVIP #performance
Enhancing FPGA Performance for Arithmetic Circuits (PB, AKV, PI, HPA), pp. 334–337.
DAC-2007-VermaBI #composition #heuristic
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits (AKV, PB, PI), pp. 404–409.
DATE-2007-VermaI #automation #scalability #synthesis
Automatic synthesis of compressor trees: reevaluating large counters (AKV, PI), pp. 443–448.
DAC-2006-VermaI #architecture #automation #towards
Towards the automatic exploration of arithmetic-circuit architectures (AKV, PI), pp. 445–450.
DATE-2006-GrossschadlIPTV #algorithm #case study #design #encryption #set
Combining algorithm exploration with instruction set design: a case study in elliptic curve cryptography (JG, PI, LP, ST, AKV), pp. 218–223.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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