Travelled to:1 × Ireland
3 × Canada
9 × USA
Collaborated with:A.Adl-Tabatabai Z.Shao R.L.Hudson V.Menon T.Shpeisman V.Trifonov ∅ B.Hertzberg C.Kozyrakis S.Monnier N.Papaspyrou C.Wang W.Chen Y.Wu C.C.Minh Y.Ni P.McGachey B.T.Lewis B.R.Murphy S.Balensiefer D.Grossman K.F.Moore A.L.Hosking J.E.B.Moss X.Zhou H.Chen Y.Gao S.Yan M.Rajagopalan J.Fang P.Zhang R.Ronen A.Mendelson A.Welc M.Bach S.Berkowits J.Cownie R.Geva S.Kozhukow R.Narayanaswamy J.Olivier S.Preis A.Tal X.Tian
Talks about:transact (8) memori (6) softwar (3) construct (2) scalabl (2) program (2) system (2) runtim (2) multi (2) type (2)
Person: Bratin Saha
DBLP: Saha:Bratin
Contributed to:
2011
2009
2008
2008
200720072007
200620062006
20022001
2000Wrote 14 papers:
- DAC-2011-Saha #architecture #composition #named #reuse #scalability
- CIRUS: a scalable modular architecture for reusable drivers (BS), pp. 260–261.
- PLDI-2009-SahaZCGYRFZRM #framework #platform #programming
- Programming model for a heterogeneous x86 platform (BS, XZ, HC, YG, SY, MR, JF, PZ, RR, AM), pp. 431–440.
- OOPSLA-2008-NiWABBCGKNOPSTT #c #c++ #design #implementation #transaction
- Design and implementation of transactional constructs for C/C++ (YN, AW, ARAT, MB, SB, JC, RG, SK, RN, JO, SP, BS, AT, XT), pp. 195–212.
- PPoPP-2008-McGacheyAHMSS #concurrent #garbage collection #memory management #transaction
- Concurrent GC leveraging transactional memory (PM, ARAT, RLH, VM, BS, TS), pp. 217–226.
- CGO-2007-WangCWSA #code generation #memory management #optimisation #transaction
- Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language (CW, WYC, YW, BS, ARAT), pp. 34–48.
- PLDI-2007-ShpeismanMABGHMS #order
- Enforcing isolation and ordering in STM (TS, VM, ARAT, SB, DG, RLH, KFM, BS), pp. 78–88.
- PPoPP-2007-Adl-TabatabaiKS #manycore #programming #transaction
- Transactional programming in a multi-core environment (ARAT, CK, BS), p. 272.
- PPoPP-2007-NiMAHHMSS #memory management #transaction
- Open nesting in software transactional memory (YN, VM, ARAT, ALH, RLH, JEBM, BS, TS), pp. 68–78.
- ISMM-2006-HudsonSAH #memory management #named #scalability #transaction
- McRT-Malloc: a scalable transactional memory allocator (RLH, BS, ARAT, BH), pp. 74–83.
- PLDI-2006-Adl-TabatabaiLMMSS #compilation #memory management #performance #runtime #transaction
- Compiler and runtime support for efficient software transactional memory (ARAT, BTL, VM, BRM, BS, TS), pp. 26–37.
- PPoPP-2006-SahaAHMH #manycore #memory management #named #performance #runtime #transaction
- McRT-STM: a high performance software transactional memory system for a multi-core runtime (BS, ARAT, RLH, CCM, BH), pp. 187–197.
- POPL-2002-ShaoSTP #type system
- A type system for certified binaries (ZS, BS, VT, NP), pp. 217–232.
- PLDI-2001-MonnierSS
- Principled Scavenging (SM, BS, ZS), pp. 81–91.
- ICFP-2000-TrifonovSS #analysis #reflexive
- Fully reflexive intensional type analysis (VT, BS, ZS), pp. 82–93.