Travelled to:
1 × Germany
1 × USA
2 × France
Collaborated with:
D.Marculescu S.Garg Y.Chuang Y.Chang D.Chiou Y.Chen S.Chang Z.Qian P.Bogdan C.Tsui R.Marculescu
Talks about:
thermal (2) statist (2) variat (2) leakag (2) power (2) model (2) chip (2) multiprocessor (1) transistor (1) algorithm (1)
Person: Da-Cheng Juan
DBLP: Juan:Da=Cheng
Contributed to:
Wrote 4 papers:
- DATE-2013-QianJBTMM #analysis #named #performance #using
- SVR-NoC: a performance analysis tool for network-on-chips using learning-based support vector regression model (ZQ, DCJ, PB, CYT, DM, RM), pp. 354–357.
- DATE-2012-JuanCMC #modelling #optimisation #power management #statistics
- Statistical thermal modeling and optimization considering leakage power variations (DCJ, YLC, DM, YWC), pp. 605–610.
- DATE-2011-JuanGM #3d #evaluation #multi #process #statistics
- Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations (DCJ, SG, DM), pp. 383–388.
- DAC-2007-ChiouJCC #algorithm #fine-grained #power management
- Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization (DSC, DCJ, YTC, SCC), pp. 81–86.