Travelled to:4 × USA
5 × France
Collaborated with:D.Marculescu S.Ananthanarayanan H.D.Patel M.Shafique J.Henkel Y.Turakhia B.Raghunathan D.Juan D.Gnad R.Marculescu Ü.Y.Ogras A.Rajendiran M.V.Tripunitara
Talks about:processor (4) process (4) system (4) chip (4) variabl (3) silicon (3) variat (3) level (3) dark (3) perspect (2)
Person: Siddharth Garg
DBLP: Garg:Siddharth
Contributed to:
2015
20142013201320122011200920092007Wrote 10 papers:
- DATE-2015-ShafiqueGGH #manycore #variability
- Variability-aware dark silicon management in on-chip many-core systems (MS, DG, SG, JH), pp. 387–392.
- DAC-2014-ShafiqueGHM #challenge #reliability #variability
- The EDA Challenges in the Dark Silicon Era: Temperature, Reliability, and Variability Perspectives (MS, SG, JH, DM), p. 6.
- DAC-2013-TurakhiaRGM #architecture #multi #named #synthesis
- HaDeS: architectural synthesis for heterogeneous dark silicon chip multi-processors (YT, BR, SG, DM), p. 7.
- DATE-2013-AnanthanarayananGP #detection #fault #low cost #set #using
- Low cost permanent fault detection using ultra-reduced instruction set co-processors (SA, SG, HDP), pp. 933–938.
- DATE-2013-RaghunathanTGM #multi #named #process
- Cherry-picking: exploiting process variations in dark-silicon homogeneous chip multi-processors (BR, YT, SG, DM), pp. 39–44.
- DAC-2012-RajendiranAPTG #reliability #set
- Reliable computing with ultra-reduced instruction set co-processors (AR, SA, HDP, MVT, SG), pp. 697–702.
- DATE-2011-JuanGM #3d #evaluation #multi #process #statistics
- Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations (DCJ, SG, DM), pp. 383–388.
- DAC-2009-GargMMO #design #multi #perspective
- Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective (SG, DM, RM, ÜYO), pp. 818–821.
- DATE-2009-GargM #3d #analysis #process #variability
- System-level process variability analysis and mitigation for 3D MPSoCs (SG, DM), pp. 604–609.
- DATE-2007-GargM #analysis #design #interactive #multi #process #throughput
- Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs (SG, DM), pp. 403–408.