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Open Knowledge
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Travelled to:
2 × France
2 × Germany
2 × USA
Collaborated with:
V.Bertacco A.DeOrio R.Morad F.Fummi S.Vinco A.Ziv C.Hsu R.Gal A.Koyfman N.Bombieri A.M.Kaushik H.D.Patel B.Mammo D.Pidan A.Nahir
Talks about:
acceler (4) architectur (3) simul (3) instruct (2) perform (2) level (2) event (2) check (2) high (2) gpus (2)

Person: Debapriya Chatterjee

DBLP DBLP: Chatterjee:Debapriya

Contributed to:

DATE 20142014
DATE 20132013
DAC 20122012
DATE 20122012
DAC 20092009
DATE 20092009

Wrote 7 papers:

DATE-2014-HsuCMGB #architecture #named #performance #validation
ArChiVED: Architectural checking via event digests for high performance validation (CHH, DC, RM, RG, VB), pp. 1–6.
DATE-2013-BertaccoCBFVKP #on the #using
On the use of GP-GPUs for accelerating compute-intensive EDA applications (VB, DC, NB, FF, SV, AMK, HDP), pp. 1357–1366.
DAC-2012-ChatterjeeKMZB #architecture #platform
Checking architectural outputs instruction-by-instruction on acceleration platforms (DC, AK, RM, AZ, VB), pp. 955–961.
DAC-2012-VincoCBF #architecture #gpu #named
SAGA: SystemC acceleration on GPU architectures (SV, DC, VB, FF), pp. 115–120.
DATE-2012-MammoCPNZMB #approximate #simulation
Approximating checkers for simulation acceleration (BM, DC, DP, AN, AZ, RM, VB), pp. 153–158.
DAC-2009-ChatterjeeDB #simulation
Event-driven gate-level simulation with GP-GPUs (DC, AD, VB), pp. 557–562.
DATE-2009-ChatterjeeDB #named #simulation
GCS: High-performance gate-level simulation with GPGPUs (DC, AD, VB), pp. 1332–1337.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.