Travelled to:2 × Germany
3 × France
3 × USA
Collaborated with:S.K.Shukla S.Ananthanarayanan S.Garg A.Prakash R.Sinha R.A.Bergamaschi A.Rajendiran M.V.Tripunitara D.N.Bui E.A.Lee I.Liu J.Reineke V.Bertacco D.Chatterjee N.Bombieri F.Fummi S.Vinco A.M.Kaushik
Talks about:instruct (3) system (3) architectur (2) processor (2) abstract (2) design (2) comput (2) ultra (2) reduc (2) level (2)
Person: Hiren D. Patel
DBLP: Patel:Hiren_D=
Contributed to:
2013
2012201220112011200720072006Wrote 9 papers:
- DATE-2013-AnanthanarayananGP #detection #fault #low cost #set #using
- Low cost permanent fault detection using ultra-reduced instruction set co-processors (SA, SG, HDP), pp. 933–938.
- DATE-2013-BertaccoCBFVKP #on the #using
- On the use of GP-GPUs for accelerating compute-intensive EDA applications (VB, DC, NB, FF, SV, AMK, HDP), pp. 1357–1366.
- DAC-2012-RajendiranAPTG #reliability #set
- Reliable computing with ultra-reduced instruction set co-processors (AR, SA, HDP, MVT, SG), pp. 697–702.
- DATE-2012-PrakashP #architecture #memory management #precise
- An instruction scratchpad memory allocation for the precision timed architecture (AP, HDP), pp. 659–664.
- DAC-2011-BuiLLPR #architecture #multi
- Temporal isolation on multiprocessing architectures (DNB, EAL, IL, HDP, JR), pp. 274–279.
- DATE-2011-SinhaP #representation #state machine #synthesis
- Abstract state machines as an intermediate representation for high-level synthesis (RS, HDP), pp. 1406–1411.
- DAC-2007-PatelS #design #modelling #validation
- Model-driven Validation of SystemC Designs (HDP, SKS), pp. 29–34.
- DATE-2007-PatelS #abstraction
- Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL (HDP, SKS), pp. 279–284.
- DATE-2006-PatelSB #behaviour #design
- Heterogeneous behavioral hierarchy for system level designs (HDP, SKS, RAB), pp. 565–570.