Travelled to:1 × Germany
3 × France
3 × USA
Collaborated with:D.Sciuto M.Bombana F.Ferrandi G.Agosta V.Rana F.Perini G.Pelosi M.Chiamenti A.A.Nacci I.Beretta D.Atienza
Talks about:synthesi (4) system (3) level (3) design (2) simul (2) model (2) high (2) base (2) methodolog (1) implement (1)
Person: Francesco Bruschi
DBLP: Bruschi:Francesco
Contributed to:
2013
201120072004200320032002Wrote 8 papers:
- DAC-2013-NacciRBSBA #algorithm #implementation #synthesis
- A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices (AAN, VR, FB, DS, IB, DA), p. 6.
- DATE-2011-BruschiPRS #automaton #performance
- An efficient Quantum-Dot Cellular Automata adder (FB, FP, VR, DS), pp. 1220–1223.
- DAC-2007-AgostaBPS #approach #canonical
- A Unified Approach to Canonical Form-based Boolean Matching (GA, FB, GP, DS), pp. 841–846.
- DATE-DF-2004-BruschiB #communication #design #synthesis
- A Design Methodology for the Exploitation of High Level Communication Synthesis (FB, MB), pp. 180–185.
- DAC-2003-AgostaBS #modelling #static analysis #transaction
- Static analysis of transaction-level models (GA, FB, DS), pp. 448–453.
- DATE-2003-BombanaB #synthesis
- SystemC-VHDL Co-Simulation and Synthesis in the HW Domain (MB, FB), pp. 20101–20105.
- DATE-2003-BruschiF #behaviour #modelling #synthesis
- Synthesis of Complex Control Structures from Behavioral SystemC Models (FB, FF), pp. 20112–20119.
- DATE-2002-BruschiCFS #design #fault #simulation
- Error Simulation Based on the SystemC Design Description Language (FB, MC, FF, DS), p. 1135.